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Effect of Temperature, Do** and Gate Material Engineering on Tri-Gate SOI nFinFET Performance Through TCAD Simulation
Temperature, do** concentration, and gate work function all have a significant impact on performance of transistor during miniaturization. The...
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Selection of materials and optimization of antireflection coatings for silicon solar cells using Sentaurus TCAD
In this article, antireflection coatings (ARC) were designed for silicon-based solar cells, and their corresponding performance parameters were...
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Investigation and optimization of ultrathin Cu(In,Ga)Se2 solar cells by using silvaco-TCAD tools
This paper presents an investigation of ultrathin Cu (In 1− x Ga x ) Se 2 solar cell which was calibrated from the fabricated cell using Silvaco-TCAD...
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A Non-linear Circuit Model For Silicon Tunnel Field-Effect Transistors
A non-linear circuit model is proposed for silicon tunnel field-effect transistors (TFETs). The model is mainly targeted to include the ambipolar...
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The scaled FinFET well formation using heated implantation
FinFET do** via implantation at room temperature could result in Fin damage within the Fin body and degrade Fin device performance. Heated...
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Performance Analysis of MoTe2/MoSe2 and MoTe2/WSe2 Heterostructure Double-Gate MOSFET
In this work, the performance of a heterostructure molybdenum ditelluride (MoTe 2 /MoSe 2 and MoTe 2 /WSe 2 ) double-gate (DG) metal–oxide–semiconductor...
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Analytical Modeling of Performance Improved Negative Capacitance Heterojunction TFETs
The drain current enhancement and subthreshold swing reduction capabilities of negative capacitance in a double gate heterojunction tunnel...
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Design of Hetero-Dielectric Single-Metal Gate-All-Around MOSFET with Schottky Contact Source/Drain
One of the most promising device configurations for extending CMOS device scaling is the gate-all-around MOSFET since it provides excellent...
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Impact of Back-Gate Radiation on Single-Event Effects of Ultrathin Body and Buried Oxide Fully Depleted Silicon-on-Insulator MOSFETs
A trajectory comparison method is proposed to study the impact of back-gate radiation on single-event effects (SEE) of ultrathin body and buried...
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Analysis of the Impact of Interface Trap Charges on the Analog/RF Performance of a Graphene Nanoribbon Vertical Tunnel FET
One of the critical assessments in determining the functionality of a device is the issue of reliability in the context of the trap charges at the...
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Dielektrisch modulierter Biosensor basierend auf vertikalem Tunnel-Feldeffekt-Transistor
Dieses Kapitel diskutiert die Anwendung von vertikalen Tunnel-FET (VTFET) als dielektrisch modulierter, markierungsfreier Biosensor. Es werden...
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Enhancement Mode AlGaN/GaN MISHEMT on Ultra-Wide Band Gap β-Ga2O3 Substrate for RF and Power Electronics
A numerical simulation-based high-performance metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) on an ultra-wide band gap...
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4.87 kV SiC MOSFET Using HfSiOx/SiO2 Gate Dielectrics Combined with PN Pillars
A novel structure of a silicon carbide (SiC) double-trench metal oxide semiconductor field-effect transistor (DTMOSFET) is proposed using a hafnium...
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Performance Analysis of GaN/AlGaN/AlN/GaN MIS-MODFETs with High-κ as Gate Dielectric Insulator Layer
In this work, the impact of high- κ permittivity gate dielectric materials on electrical performance of GaN MODFETs has been studied by using Matlab...
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Performance Analysis of AlGaN MOSHEMT Based Biosensors for Detection of Proteins
Proteins are existing in different condensations in samples of various origins and knowing their focus is especially important as there are different...
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1.3 kV Vertical GaN-Based Trench MOSFETs on 4-Inch Free Standing GaN Wafer
In this work, a vertical gallium nitride (GaN)-based trench MOSFET on 4-inch free-standing GaN substrate is presented with threshold voltage of...
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Dielectric-Modulated Biosensor Based on Vertical Tunnel Field-Effect Transistor
This chapter discusses the application of vertical tunnel FET (VTFET) as dielectric-modulated label-free biosensor. Various features of this...
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Design and Qualitative Analysis of 5-nm Nanowire TFET with Spacer Engineering
An advanced hetero-dielectric gate oxide nanowires tunnel field-effect transistor (HD NW TET) with the spacer on both sides of the gate is proposed...
