![Loading...](https://link.springer.com/static/c4a417b97a76cc2980e3c25e2271af3129e08bbe/images/pdf-preview/spacer.gif)
-
Article
Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs
We present a review of our recent studies of Bias Temperature Instability (BTI) in Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) fabricated with different material systems, highlighting the reli...
-
Article
Effect of Al-content and Post Deposition Annealing on the Electrical Properties of Ultra-thin HfAlxOy Layers
Scaled HfAlxOy/SiO2 stacks down to 1.5 nm EOT have been achieved. Although the addition of Al to the HfO2 matrix can be beneficial, it is observed that the benefit of using a Hf-aluminate is compromised if the fi...
-
Article
The Influence of Defects on Compatibility and Yield of the HfO2-PolySilicon Gate Stack for CMOS Integration
Hafnium-based dielectrics are under wide consideration for high-K gate dielectric applications. Since the gate electrode typically used in CMOS integration consists of polysilicon with n- or p-type dopants, co...
-
Article
Thermal Stability of High k Layers
Thermal stability of amorphous phases in various high-k layers (Al2O3, ZrO2, HfO2, ZrAlOx, HfAlOx and HfSiOx) and the phase transformation of crystalline ZrO2 and HfO2 were studied experimentally, as functions of...
-
Article
Catalytic Forming Gas Anneal on III-V/Ge MOS systems
Catalytic-FGA, a combination of the standard forming gas anneal with a catalytic metal gate, has been applied to study the hydrogen passivation of III-V/Ge MOS systems. Pd (or Pt) metal gate catalytically diss...
-
Article
Seedless Templated Growth of Hetero-Nanostructures for Novel Microelectronics Devices
The feasibility of a templated seedless approach for growing segmented p-i-n nanowires -based diodes based on selective epitaxial growth is demonstrated. Such diodes are the basic structure for a Tunnel Field ...
-
Article
Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials
Over the years, many new materials have been introduced in advanced complementary metal oxide semiconductor (CMOS) processes in order to continue the trend of reducing the gate length and increasing the perfor...
-
Article
(Selective) Epitaxial Growth of Strained Si to Fabricate Low Cost and High Performance CMOS Devices
Tensile strained Si on SiGe Strain Relaxed Buffers (SRB) is an interesting candidate to increase both electron and hole mobility which results in improved device performance. Most of this work was/is based on ...
-
Article
Physical characterization of HfO2 deposited on Ge substrates by MOCVD
Germanium is because of its intrinsically higher mobility than Si, currently under consideration as an alternative approach to improve transistor performance. Germanium oxide, however, is thermodynamically uns...
-
Article
Physical characterization of HfO2deposited on Ge substrates by MOCVD.
Germanium is because of its intrinsically higher mobility than Si, currently under consideration as an alternative approach to improve transistor performance. Germanium oxide, however, is thermodynamically uns...
-
Article
High-k Materials for Advanced Gate Stack Dielectrics: a Comparison of ALCVD and MOCVD as Deposition Technologies
In the quest for ever smaller transistor dimensions, the well-known and reliable SiO2 gate dielectric material needs to be replaced by alternatives whith higher dielectric constants in order to reduce the gate le...
-
Article
The Influence of Defects on Compatibility and Yield of the HfO2-PolySilicon Gate Stack for CMOS Integration
Hafnium-based dielectrics are under wide consideration for high-K gate dielectric applications. Since the gate electrode typically used in CMOS integration consists of polysilicon with n- or p-type dopants, co...
-
Article
Influence of pre and post process conditions on the composition of thin Si3N4 thin Alms (3 nm) studied by XPS and TOFSIMS
With the downscaling of the electronic devices and the increase in the frequency of the electronic circuits, a large search for new gate dielectric is ongoing. The exact composition and element distribution in...
-
Article
Measurement Technique, Oxide Thickness and Area Dependence of Soft-Breakdown
For sub-5 nm oxides there are two different stages for breakdown; soft breakdown (SBD) and hard breakdown (HBD). It has been shown that both SBD and HBD exhibit the same statistics. Therefore, the physical mec...
-
Article
Modelling the influence of pad bending on the planarization performance during CMP
One of the major problems with oxide-CMP is the oxide thickness variation after CMP within one die, the socalled Within Die Non-Uniformity (WIDNU). The variations in pattern density of the design layout causes...
-
Article
Influence of Boron Diffusion on Ultra-Thin Oxides
In this paper the effect of different annealing conditions on boron diffusion is studied for 3 nm gate dielectrics. The use of amorphous material instead of polycrystalline material and the influence of nitrid...
-
Article
Gas Stream Analysis and PFC Recovery in A Semiconductor Process
The performance of pressure swing adsorption (PSA) technology was assessed for recovering PFCs from the exhaust of a semiconductor plasma process. Several PSA process conditions were run to determine an optimi...
-
Article
Chlorine Precursors For Gate Oxidation Processes
1,1,1-Trichloroethane (TCA) has played a vital rôle in contemporary semiconductor fabrication as a source for chlorine during the oxidation of silicon substrates. However, TCA has been identified as an ozone d...
-
Article
Surface Characterisation of Si After HF Treatments and its Influence on the Dielectric Breakdown of Thermal Oxides
The characteristics of the HF-treated Si-surface are investigated as a function of dip** time in dilute HF solutions. It is found that the contact angle is a very sensitive measure for the degree of oxidatio...
-
Article
Cleaning Procedures for UHV Cluster-tool MOS Fabrication
We have investigated the effect on a silicon surface of both wet chemical and cluster-tool UV/ozone cleaning, prior to UHV processing to fabricate MOS test structures. The physical and chemical condition of th...