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  1. No Access

    Chapter and Conference Paper

    Toward Smart Doors: A Position Paper

    Conventional automatic doors cannot distinguish between people wishing to pass through the door and people passing by the door, so they often open unnecessarily. This leads to the need to adopt new systems in ...

    Luigi Capogrosso, Geri Skenderi in Pattern Recognition, Computer Vision, and … (2023)

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    Chapter and Conference Paper

    On the Simulation and Automatic Parametrization of Metabolic Networks Through Electronic Design Automation

    This work presents a platform for the modelling, simulation and automatic parametrization of semi-quantitative metabolic networks. Starting from a network modelled through Petri Nets (PN) and represented in SB...

    Nicola Bombieri, Antonio Mastrandrea in Computational Intelligence Methods for Bio… (2020)

  3. No Access

    Chapter

    Generation of Functional Mockup Units for Transactional Cyber-Physical Virtual Platforms

    Modeling Cyber-Physical Systems requires aggregating semantics and languages tailored to different specific domains, while simulating these systems requires integrating different tools and technologies. Academ...

    Stefano Centomo, Michele Lora, Franco Fummi in Languages, Design Methods, and Tools for E… (2020)

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    Chapter

    Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction

    Each year automotive systems are becoming smarter thanks to their enhancement with sensing, actuation and computation features. The recent advancements in the field of autonomous driving have increased even mo...

    Enrico Fraccaroli, Francesco Stefanni in Languages, Design Methods, and Tools for E… (2019)

  5. No Access

    Chapter

    Automatic Integration of HDL IPs in Simulink Using FMI and S-Function Interfaces

    Verification of cyber-physical systems SW often requires simulation of accurate heterogeneous HW models. However, heterogeneous system simulators do not easily allow it and designers must connect multiple simu...

    Stefano Centomo, Michele Lora in Languages, Design Methods, and Tools for E… (2019)

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    Book

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    Reference Work Entry In depth

    Semiformal Assertion-Based Verification of Hardware/Software Systems in a Model-Driven Design Framework

    Since the mid-1990s, Model-Driven Design (MDD) methodologies (Selic, IEEE Softw 20(5):19–25, 2003) have aimed at raising the level of abstraction through an extensive use of generic models in all the phases o...

    Graziano Pravadelli, Davide Quaglia, Sara Vinco in Handbook of Hardware/Software Codesign (2017)

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    Chapter

    Smart System Case Studies

    This chapter presents two case studies showing how the proposed approach applies to smart system design and optimization. The former is the virtual prototy** platform built for a laser pico-projector actuato...

    Ignazio Blanco, Fabio Cenni, Roberto Carminati in Smart Systems Integration and Simulation (2016)

  9. No Access

    Chapter

    Design Domains and Abstraction Levels for Effective Smart System Simulation

    Smart systems represent a broad class of systems defined as intelligent, miniaturized devices incorporating functionality like sensing, actuation, and control. In order to support these functions, they must in...

    Sara Vinco, Michele Lora, Valerio Guarnieri in Smart Systems Integration and Simulation (2016)

  10. No Access

    Living Reference Work Entry In depth

    Semiformal Assertion-Based Verification of Hardware/Software Systems in a Model-Driven Design Framework

    Since the mid-1990s, Model-Driven Design (MDD) methodologies (Selic, IEEE Softw 20(5):19–25, 2003) have aimed at raising the level of abstraction through an extensive use of generic models in all the phases o...

    Graziano Pravadelli, Davide Quaglia, Sara Vinco in Handbook of Hardware/Software Codesign

  11. No Access

    Article

    HDL code generation from UML/MARTE sequence diagrams for verification and synthesis

    Design of Embedded Systems is becoming more and more complex in terms of verify that requirements are fulfilled at different design levels. This requires the simulation of the system and the checking of its ti...

    Emad Ebeid, Franco Fummi, Davide Quaglia in Design Automation for Embedded Systems (2015)

  12. No Access

    Article

    Reusing RTL Assertion Checkers for Verification of SystemC TLM Models

    The recent trend towards system-level design gives rise to new challenges for reusing existing (RTL) intellectual properties (IPs) and their verification environment in (TLM). While techniques and tools to abs...

    Nicola Bombieri, Franco Fummi, Valerio Guarnieri in Journal of Electronic Testing (2015)

  13. No Access

    Chapter

    Code Generation Alternatives to Reduce Heterogeneous Embedded Systems to Homogeneity

    The high level of heterogeneity of modern embedded systems forces designers to use different computational models and formalisms, thus making reuse and integration very difficult tasks. Reducing such an hetero...

    Franco Fummi, Michele Lora in Languages, Design Methods, and Tools for E… (2015)

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    Chapter and Conference Paper

    Dynamic Modeling and Simulation of Leukocyte Integrin Activation through an Electronic Design Automation Framework

    Model development and analysis of biological systems is recognized as a key requirement for integrating in-vitro and in-vivo experimental data. In-silico simulations of a biochemical model allows one to test d...

    Nicola Bombieri, Rosario Distefano in Computational Methods in Systems Biology (2014)

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    Article

    On the Reuse of Heterogeneous IPs into SysML Models for Integration Validation

    The paper proposes an integrated methodology to abstract already existing heterogeneous IPs into SysML behavioral equivalent models. This approach aims at integrating the abstracted components with partially s...

    Nicola Bombieri, Emad Ebeid, Franco Fummi, Michele Lora in Journal of Electronic Testing (2013)

  16. No Access

    Article

    On the Reuse of TLM Mutation Analysis at RTL

    Mutation analysis has gained consensus during the last decades as being an efficient technique for measuring the quality of SW testbench. More recently, it has been efficiently applied for validating testbench...

    Valerio Guarnieri, Giuseppe Di Guglielmo, Nicola Bombieri in Journal of Electronic Testing (2012)

  17. No Access

    Article

    FAST: An RTL Fault Simulation Framework based on RTL-to-TLM Abstraction

    Functional verification techniques based on fault injection and simulation at register-transfer level (RTL) have been largely investigated in the past years. Although they have various advantages such as scala...

    Nicola Bombieri, Franco Fummi, Valerio Guarnieri in Journal of Electronic Testing (2012)

  18. No Access

    Article

    Time-Constraint-Aware Optimization of Assertions in Embedded Software

    Technology shrinking and sensitization have led to more and more transient faults in embedded systems. Transient faults are intermittent and non-predictable faults caused by external events, such as energetic ...

    Viacheslav Izosimov, Giuseppe Di Guglielmo, Michele Lora in Journal of Electronic Testing (2012)

  19. No Access

    Article

    HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels

    SystemC is the de-facto standard language for system-level modeling, architectural exploration, performance analysis, software development, and functional verification of embedded systems. Nevertheless, it has...

    Nicola Bombieri, Franco Fummi, Valerio Guarnieri in Design Automation for Embedded Systems (2012)

  20. No Access

    Article

    Efficient Generation of Stimuli for Functional Verification by Backjum** Across Extended FSMs

    Extended finite state machines (EFSMs) can be efficiently adopted to model the functionality of complex designs without incurring the state explosion problem typical of the more traditional FSMs. However, trav...

    Giuseppe Di Guglielmo, Luigi Di Guglielmo, Franco Fummi in Journal of Electronic Testing (2011)

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