Search
Search Results
-
Photonic Beamforming Incorporating Ring Resonator Based on Silicon-on-Insulator Waveguide Technology
Millimeter-wave band opens new opportunities for ultra-high data rates and dense connectivity in forthcoming 5G and 6G wireless cellular networks....
-
Formation of Globally Uniaxial Strain in He+ Implanted Silicon-on-Insulator Wafers Based on the Size Effect of Internal Stress of Strip SiN Films
In this paper, we proposed a method of introducing globally uniaxial strain into SOI(silicon-on-insulator) wafers, and the strain mechanism was...
-
Buried Metal Silicon-on-Insulator Junctionless Transistor for Low Power CMOS Logic Circuits
This paper deals with an innovative structure of silicon-on-insulator junctionless transistor (SOIJLT) by incorporating a buried metal layer of...
-
Design and Analysis of Gate Stack Silicon-on-Insulator Nanosheet FET for Low Power Applications
Since the introduction of fast integrated circuits, semiconductor manufacturers have concentrated their efforts on reducing the size of transistors....
-
A Quantitative Comparison Between the Electrical Characteristics of Vertical Super Thin Body (VSTB) FET and Silicon on Insulator Vertical Super-Thin Body (SOI VSTB) FET
In this study, a silicon on insulator vertical super-thin body (SOI VSTB FET) is proposed and a comparative analysis of the electrical properties of...
-
Efficient Coupling in Transverse Strip Metal-Insulator-Metal Structure on Silicon-on-Insulator Layer Stack
This article presents a new directional coupling between two transverse strip metal-insulator-metal (TS-MIM) waveguides on silicon-on-insulator (SOI)...
-
The Strain Model for Globally Strained Silicon on Insulator Wafer Based on High-stress SiN Film Deposition
In this paper, based on the straining mechanism of plastic deformation and the flexible slip properties of buried SiO 2 layers for the sSOI wafer, a...
-
Design and Application of Silicon on Insulator Based SiGe VTFET in IIR Filter by Balanced Truncation (BT) Method of Model Order Reduction
In this paper, N-type and P-Type low power SiGe Silicon on Insulator Vertical TFET (SOI-VTFETs) are designed and then their drain current is...
-
A Novel Silicon on Insulator MESFET with Multi-∏ Regions to Improve DC and RF Performances
In order to improve DC and RF performances of silicon on insulator metal semiconductor field effect transistor (SOI MESFET) devices a novel structure...
-
Silicon on Insulator C-VTFET Based Design of low Complexity Sparse Quadrature Mirror Filter Using Differential Search Algorithm
In this paper, a 60 nm Complementary-Vertical TFET (C-VTFET) is designed using silicon on insulation technology is implemented for low power...
-
Analysis of Underlap Strained Silicon on Insulator MOSFET for Accurate and Compact Modeling
Recently, transistors with an underlapped gate structure have been widely studied to overcome several challenges associated with nanoscale devices....
-
Performance Investigation of Silicon-on-Insulator Junctionless Drain Extended FinFET for High Power, Radio Frequency Applications
This research article explores the scope of Silicon-On-Insulator (SOI) Junctionless (JL) Drain Extended (De) FinFET and compared it with Conventional...
-
Design and Simulation of Vertical Bi-Directional Fringe Field Tuning of New Improved MEMS Accelerometer Using SOI Technology for Stress Compensation
A new conceptual utilization of Silicon on Insulator (SOI) wafer is reported for bi-directional vertical electrostatic fringe field tuning of the...
-
Optimization and Comparative Analysis of Rectangular and Slot Waveguide based Symmetric Ring and Racetrack Resonators for SoI Photonic Integrated Filters
Over the past decades Silicon on Insulator (SoI) technology has tantalized the interest of researchers in the design of numerous nonlinear Photonic...
-
A Silicon on Nothing LDMOS with Two Air Pillars in Gate Insulator for Power Applications
This paper proposes a new silicon on nothing lateral double-diffused metal-oxide-semiconductor with two air gaps in the gate insulator (SON-APG...
-
Achieving a High Figure of Merit in LDMOSFETs with Double P-window in Silicon Dioxide
In this paper, to achieve a high figure of merit (FOM), a new Lateral Double Diffused Metal Oxide Semiconductor (LDMOS) device is presented. This new...
-
A Review on—Spintronics an Emerging Technology
This review describes an emerging field of electronics devices; electron spin exploitation use for a further degree of freedom incorporation to...
-
Embedding Two P+ Pockets in the Buried Oxide of Nano Silicon on Insulator MOSFETs: Controlled Short Channel Effects and Electric Field
This paper proposes an efficient structure for nanoscale silicon on insulator (SOI) MOSFETs. Two P + pockets are considered in buried oxide, a pocket...
-
Simulation of GAA-NW-TFET Biosensor with Cluster Charge Probes for Target Biomolecule Detection
This study introduces and simulates a Gate-All-Around Nanowire Tunnel Field Effect Transistor (GAA-NW-TFET) biosensor for biomolecule detection. The...
-
Fabrication and Mathematical Modelling of a ITO-Al2O3-Si SIS Solar Cell
Schottkey heterojunction devices became very popular in the 7th decade of last century. The solar cell technology also adopted the schottkey hetero...