Skip to main content

11 Result(s)

within Seng-Pan U Remove this filter

and

  1. Article

    Open Access

    Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active–passive loop-filters

    The design and optimization methodology for CT ΣΔ modulators with hybrid Active–Passive (AP) loop-filters is indicated in this work. From the discussion, by appropriately scaling the passive filter gain and co...

    Chen-Yan Cai, Yang Jiang, Sai-Weng Sin… in Analog Integrated Circuits and Signal Proc… (2013)

    Download PDF (1507 KB) View Article

  2. No Access

    Book

    Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters

    Sai-Weng Sin, Seng-Pan U… in Analog Circuits and Signal Processing (2011)

  3. No Access

    Chapter

    Introduction

    Driven by continuous downscale of integrated circuit technology, Digital Signal Processing (DSP) and microprocessors constitute the most vital part of the evolution of modern electronic systems. Based on the a...

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  4. No Access

    Chapter

    Design of a 1.2 V, 10-bit, 60–360 MHz Time-Interleaved Pipelined ADC

    ADCs with resolution of eight to 12 bits and sampling rates of several hundreds of mega-samples-per-second (MS/s) found increasing importance in various types of wide-band applications, like in wireless transc...

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  5. No Access

    Chapter

    Conclusions and Prospective for Future Work

    The research work presented in this book led to the development of various techniques for the design of high-speed analog-to-digital converters under low-voltage environment imposed by CMOS technology scaling....

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  6. No Access

    Chapter

    Challenges in Low-Voltage Circuit Designs

    Low voltage designs continue to play important roles, as well as creating challenges, in modern analog and mixed-signal integrated circuits (IC) that are expected to operate under low supply voltage. This is e...

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  7. No Access

    Chapter

    Experimental Results

    The proposed time-interleaved ADC [1] has been fabricated in a 0.18 μm one-poly six-metal CMOS process. The chip samples are packaged in 68-pin Ceramic Quad Flat-Pack (CQFP) packages. The successful measuremen...

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  8. No Access

    Chapter

    Advanced Low Voltage Circuit Techniques

    While both ROs and SOs can be utilized to avoid the floating switches at the opamp output nodes, many design challenges still exist in a low-voltage environment resulting in overall performance degradation whe...

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  9. No Access

    Chapter

    Time-Interleaving: Multiplying the Speed of the ADC

    While the current minimum feature size of IC fabrication technology limits the maximum achievable speed of electronic devices, parallel or time-interleaved (TI) architectures are one of the most effective solu...

    Sai-Weng Sin, Seng-Pan U… in Generalized Low-Voltage Circuit Techniques… (2011)

  10. No Access

    Book

    Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers

    Pui-In Mak, Seng-Pan U… in Analog Circuits and Signal Processing (2007)

  11. No Access

    Book

    Design of Very High-Frequency Multirate Switched-Capacitor Circuits

    Extending the Boundaries of CMOS Analog Front-End Filtering

    Seng-Pan U, Rui Paulo Martins… in The International Series in Engineering and Computer Science (2006)