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Showing 41-60 of 532 results
  1. Vertical GaN Power MOSFET with Integrated Fin-Shaped Diode for Reverse Conduction

    A vertical GaN power MOSFET featuring an integrated fin-shaped non-junction diode (FDMOS) is proposed to improve reverse conduction and switching...

    Tao Sun, **aorong Luo, ... Bo Zhang in Nanoscale Research Letters
    Article Open access 24 August 2022
  2. Enhancement noise margin and delay time performance of novel punch-through nMOS for single-carrier CMOS

    In this paper, we propose the use of punch-through nMOS (PTnMOS) as an alternative to pMOS in complementary metal oxide semiconductor (CMOS)...

    Jyi-Tsong Lin, Pei-Zhang **e, Wei-Han Lee in Discover Nano
    Article Open access 06 July 2024
  3. Improved 4H-SiC Metal–Semiconductor Field-Effect Transistors with Double-Symmetric-Step Buried Oxide Layer for High-Energy-Efficiency Applications

    An improved 4H-SiC metal–semiconductor field-effect transistor (MESFET) with a double-symmetric-step buried oxide layer is proposed, and the...

    Shunwei Zhu, Hujun Jia, ... Yintang Yang in Journal of Electronic Materials
    Article 16 May 2022
  4. Analysis of Device Parameter Variations in In1−xGaxAs Based Gate Stacked Double Metal Surrounding Gate Nanowire MOSFET

    The research focuses on the design and analysis of a Gate Stacked Double Metal Surrounding Gate Nanowire MOSFET (DMSG-NWFET) using In 1−x Ga x As as the...

    Parveen Kumar, Sanjeev Kumar Sharma, Balwinder Raj in Transactions on Electrical and Electronic Materials
    Article 16 October 2023
  5. Charge Plasma-Based Phosphorene Tunnel FET Using a Hybrid Computational Method

    In this paper, a charge plasma-based phosphorene double-gate tunnel FET (CP-BPDGTFET) is investigated. A hybrid simulation technique involving both...

    Adhithan Pon, A. Bhattacharyya, R. Ramesh in Journal of Electronic Materials
    Article 12 April 2021
  6. Sensitivity analysis of junctionless silicon NT-TFET and performance metrics comparison with the silicon NT-TFET

    In this article, we investigated the sensitivity of the junctionless silicon nanotube tunnel field-effect transistor (JLSiNT-TFET). To accomplish...

    P. Rajendiran, A. Nisha Justeena, ... D. Nirmal in Journal of Nanoparticle Research
    Article 11 June 2024
  7. Impact of Negative Bottom Gate Voltage for Improvement of RF/Analog Performance in Asymmetric Junctionless Dual Material Double Gate MOSFET

    Research on double-gate MOSFET has already exhibited several novel solutions of existing problems like reducing leakage current or short-channel...
    Arighna Basak, Arpan Deyasi, Angsuman Sarkar in New Horizons in Millimeter-Wave, Infrared and Terahertz Technologies
    Chapter 2022
  8. Heterogenous Gate Dielectric DLTFET: Reliability Perspective Against Degradation Mechanisms

    Heterogeneous gate dielectric (HD) do**less n-type tunnel-FET (HD-DLTFET) is proposed with improved reliability performance against distinct drain...

    Kanchan Cecil, Meena Panchore, Dip Prakash Samajdar in Transactions on Electrical and Electronic Materials
    Article 26 December 2021
  9. Impact of Surface States and Aluminum Mole Fraction on Surface Potential and 2DEG in AlGaN/GaN HEMTs

    The presence of surface traps is an important phenomenon in AlGaN/GaN HEMT. The electrical and physical properties of these surface traps have been...

    Pragyey Kumar Kaushik, Sankalp Kumar Singh, ... Edward Yi Chang in Nanoscale Research Letters
    Article Open access 20 October 2021
  10. Comparative investigation of low-power ferroelectric material embedded with different heterojunction vertical TFET structures

    This paper basically proposes and compares three different configurations of ferroelectric oxide material on silicon body of vertical tunnel...

    Article 20 July 2022
  11. Detection of biomolecules in dielectric modulated double metal below ferroelectric layer FET with improved sensitivity

    In this work, we examined the double metal below ferroelectric layer FET that is double metal below negative capacitance field-effect transistor...

    Yash Pathak, Bansi Dhar Malhotra, Rishu Chaujar in Journal of Materials Science: Materials in Electronics
    Article 07 May 2022
  12. Surface Potential and Drain Current 2D Analytical Modeling of Low Power Double Gate Tunnel FET

    This submitted work presents the 2-dimensional analytical modeling of Tunnel FET’s in consideration with the inherent properties of dual modulation...

    Dhruv Garg, Girish Wadhwa, ... Balwinder Raj in Transactions on Electrical and Electronic Materials
    Article 16 March 2021
  13. Modeling and Simulation of Dual-Material Asymmetric Heterojunction Tunnel Field-Effect Transistors

    Gardon Moore proposed the exponential increase in transistor packing density on integrated circuits (ICs). The semiconductor industry has managed to...
    I. Vivek Anand, T. S. Arun Samuel in Handbook of Emerging Materials for Semiconductor Industry
    Reference work entry 2024
  14. Modeling and Simulation of CZTS Thin-Film Solar Cell for Efficiency Enhancement

    CZTS solar cells have been utilized as a replacement for CIGS and CdTe solar cells in thin-film technology. With the better absorption coefficient of...

    Rabin Paul, S. Vallisree, ... F. A. Talukdar in Journal of Electronic Materials
    Article 21 February 2022
  15. A Junctionless Silicon Carbide Transistor for Harsh Environment Applications

    Silicon carbide (SiC) is the material of choice for high-temperature, high-voltage, and other harsh environment applications in high-energy physics,...

    Ratul K. Baruah, Bikram K. Mahajan, ... Roy P. Paily in Journal of Electronic Materials
    Article 13 July 2021
  16. Design and Optimization of a Heterojunction (Ge/Si) Vertical-Tunnel Field Effect Transistor (HV-TFET) with a Doped Bar for Low-Power Applications

    Tunnel field effect transistors (TFETs) are known for lower power requirements than MOSFETs due to their utilization of the band-to-band tunneling...

    Pradeep Kumar Kumawat, Shilpi Birla, Neha Singh in Journal of Electronic Materials
    Article 24 May 2024
  17. Vertical GaN Reverse Trench-Gate Power MOSFET and DC-DC Converter

    A vertical GaN reverse trench-gate power MOSFET (RT-MOSFET) device is proposed. This Vertical RT-MOSFET features the negative incline of...

    Nilesh Kumar Jaiswal, V. N. Ramakrishnan in Transactions on Electrical and Electronic Materials
    Article 13 October 2020
  18. Evidence of contact-induced variability in industrially-fabricated highly-scaled MoS2 FETs

    Evidence of microscopic inhomogeneities of the side source/drain contacts in 300 mm wafer integrated MoS 2 field-effect transistors is presented. In...

    Luca Panarella, Ben Kaczer, ... Valeri Afanas’ev in npj 2D Materials and Applications
    Article Open access 14 July 2024
  19. Gate Work Function-Engineered Graded-Channel Macaroni MOSFET: Exploration of Temperature and Localized Trapped Charge-Induced Effects with GIDL Analysis

    The current research paper presents the analytical modelling and simulation-based device characteristics of a dual-material (DM) gate-graded Channel...

    Pritha Banerjee, Jayoti Das in Journal of Electronic Materials
    Article 13 January 2022
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