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Implementation and Applications of a Ternary Threshold Logic Gate
Reducing delay, power consumption, and chip area of a logic circuit are the main targets of a digital circuit designer. Most of the times, the...
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Design of a Ternary Logic Processor Using CNTFET Technology
The design of a Ternary Logic Processor using CNTFETs (Carbon-Nanotube-Field-Effect-Transistor) is a challenging task, but it also has the potential...
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Design method for unbalanced ternary logic family based on binary memristors
This paper proposes a design method for unbalanced ternary logic family based on hybrid design of binary memristors and CMOS transistors, building on...
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Design an energy efficient pulse triggered ternary flip flops with Pseudo NCFET logic
In electronic systems, flip-flops (FFs) are one of the fundamental elements that are used in high-performance processors. With the scaling of CMOS,...
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Design of Ternary Logic Circuits Using GNRFET and RRAM
In this paper, the designs of ternary digital circuits are discussed. The ternary logic is a better choice over conventional logics due its...
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FPGA Implementation of Ternary Multiplier Using Reconfigurable Logic
The multiplier circuit of the ALU is one of the most crucial parts of the computer. Therefore, a powerful computer might be built by optimising the...
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Power Efficient CNTFET-Based Ternary Comparators
Ternary logic offers faster response and low power consumption for digital systems, which minimizes the connection complexity, chip size and power...
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A memristor crossbar based on a novel ternary memristor model
In this paper, a high-density programmable logic array based on a ternary memristor crossbar array is designed. Based on the three-valued state...
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Energy Efficient Ternary Multi-trit Multiplier Design Using Novel Adders
Ternary logic has received substantial attention over binary logic due to diminished delay, reduced power consumption, and minimized area...
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Ternary D Flip-Flop in CNFET–Memristor Technology
A D flip-flop in ternary logic is presented in this paper, which is used to store a ternary digit using Carbon Nanotube FET (CNFET)–memristor...
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Design of Ternary Multiplier Using Pseudo NCNTFETs
AbstractA novel technique is proposed in this paper to design ternary logic circuits for nanoelectronics applications. The ternary logic is a best...
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Designing of Ternary to Binary Half Adder Using CMOS
Digital systems are designed using binary radix which works on two-valued logic popularly known as low (0) and high (1). The logic operations are...
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High-Speed Less Area CNTFET Ternary Half Adder Using Pseudologic
Ternary logic is used to reduce the chip area and interconnection complexity. Furthermore, in terms of connection complexity, chip size, propagation...
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Efficient Noise Immune Robust Ternary Subtractor Designs*
Binary Logic-based circuits are restricted due to larger area occupied by interconnects, higher power consumption and large delay. To overcome all...
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Energy-Efficient Exact and Approximate CNTFET-Based Ternary Full Adders
Ternary circuits are promising due to their lower interconnect complexity, storage requirement, and lesser pin count than binary circuits. The adder...
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Design of Convolutional Encoder for Multivalued Logic
The application domain of multivalued logic is increasing due to steady advances in design tools and technology over the past decade. Three-valued...
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A High-Performance and Energy-Efficient Ternary Multiplier Using CNTFETs
Internet-of-things-based embedded systems depend on batteries as an energy resource, and thus, require energy-efficient circuits for prolonged...
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GNRFET- and CNTFET-Based Designs of Highly Efficient 22 T Unbalanced Single-Trit Ternary Multiplier Cell
The internet-of-things and mobile devices have emerged as significant drivers in enhancing the living standards. As such devices rely on batteries,...
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Design of CNTFET-Based Ternary and Quaternary Magnitude Comparator
This paper presents a novel power and energy-efficient carbon nanotube field-effect transistor (CNTFET)-based design of a quaternary magnitude...
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An Overview of Different Approaches for Ternary Reversible Logic Circuits Synthesis Using Ternary Reversible Gates with Special Reference to Virtual Reality
Quantum computing has been projected as an alternative to classical computing and promises to offer feasible solutions to problems that are...