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Evaluation of the Functional Impact of Approximate Arithmetic Circuits on Two Application Examples
Approximate arithmetic units emerge as an attractive alternative solution for high-performance, low-power, intensive computing applications. The...
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AxSA: On the Design of High-Performance and Power-Efficient Approximate Systolic Arrays for Matrix Multiplication
Compute-bound problems like matrix-matrix multiplication can be accelerated using special purpose hardware scheme such as Systolic Arrays (SAs)....
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Automated Generation and Evaluation of Application-Oriented Approximate Arithmetic Circuits
Approximate arithmetic circuits (AACs) are increasingly investigated to design high-performance and energy-efficient hardware for error-tolerant...
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Flexible Systolic Hardware Architecture for Computing a Custom Lightweight CNN in CT Images Processing for Automated COVID-19 Diagnosis
Millions of deaths worldwide have been resulted throughout the COVID-19 pandemic, thus the need of diagnosing techniques for early disease stage has...
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An integrated FIR adaptive filter design by hybridizing canonical signed digit (CSD) and approximate booth recode (ABR) algorithm in DA architecture for the reduction of noise in the sensor nodes
The Finite Impulse Response (FIR) filter plays an important role in many signal processing applications. This manuscript proposes an intuitive...
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Enabling Efficient Inference of Convolutional Neural Networks via Approximation
With the rapid advancements in the Artificial Intelligence area, Neural Networks (NNs) became the driving force both in general purpose and embedded...
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Effects of myocardial sheetlet sliding on left ventricular function
Left ventricle myocardium has a complex micro-architecture, which was revealed to consist of myocyte bundles arranged in a series of laminar...
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Concept of the Blocks Architecture
CGRAs traditionally use a control scheme that is either completely centralized or completely decentralized. Systolic arrays operating in lock-step...
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Design of Multiplier Circuits
Over the past few decades, researchers have been trying to improve the architecture of a multiplier in terms of speed, power or area. This is because...
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A fast computational model for circulatory dynamics: effects of left ventricle–aorta coupling
The course of diseases such as hypertension, systolic heart failure and heart failure with a preserved ejection fraction is affected by interactions...
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An Off-Chip Memory Access Optimization for Embedded Deep Learning Systems
Implementations of Deep Neural Networks (DNNs) or Deep Learning (DL) for embedded applications may improve the users’ quality of life, as DL has...
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Individual Ascent and Descent Evacuation Performance on Long Stairs Considering the Effects of Step** Pattern and Light Conditions
To better understand the movement characteristics of pedestrians on long stairs, a series of individual evacuation experiments on a 12-level...
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An isogeometric analysis framework for ventricular cardiac mechanics
The finite element method (FEM) is commonly used in computational cardiac simulations. For this method, a mesh is constructed to represent the...
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Multivariate Fuzzy Logic Based Smart Healthcare Monitoring for Risk Evaluation of Cardiac Patients
In this chapter, the multi-dimensional fuzzy logic design is implemented to develop smart and pervasive healthcare application systems for...
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High performance hardware design of compressor adder in DA based FIR filters for hearing aids
Hearing aid is an acoustic device which is worn by hearing loss people. To compensate the different types of hearing loss, it is necessary to...
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Explainable AI Acceleration Using Tensor Processing Units
In this chapter, we describe an efficient framework to enable acceleration of explainable artificial intelligence (AI) with hardware accelerators....
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Efficient Hardware Acceleration of Emerging Neural Networks for Embedded Machine Learning: An Industry Perspective
As neural networks become more complex, the energy required for doing training and inference has resulted in a noticeable shift towards adopting...
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RNS for DNN Architectures
Modern Deep Learning models keep growing in depth and number of parameters and require a huge amount of elementary arithmetic operations, the...
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Design and Implementation of Adders and Multipliers for DSP Applications
Adders and multipliers are the most fundamental components of a Digital Signal Processing (DSP). The design and implementation of several adders and...
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CNN Hardware Accelerator Architecture Design for Energy-Efficient AI
Reducing the energy consumption of deep neural network hardware accelerator is critical to democratizing deep learning technology. This chapter...