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Hardware Implementation of MRO-ELM for Online Sequential Learning on FPGA
This paper presents a parallel hardware accelerator for an online variant of the extreme learning machine (ELM) algorithm, called mixed-norm...
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Virtual Network Function Development for NG-PON Access Network Architecture
Modern networks urge agility, flexibility, and capacity to cope with the growing demand for media content and applications increasingly oriented...
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Cross-Architecture Knowledge Distillation
The Transformer network architecture has gained attention due to its ability to learn global relations and its superior performance. To boost...
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Towards connection-scalable RNIC architecture
Remote Direct Memory Access (RDMA) is a widely adopted optimization strategy in datacenter networking that surpasses traditional kernel-based TCP/IP...
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A Model-Based Systems Engineering Plugin for Cloud Security Architecture Design
Security is one of the biggest concerns for cloud infrastructures. Cloud infrastructures are susceptible to a wide range of threats, including...
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Lightweight micro-architecture for IoT & FPGA security
Cryptographic standards were created with the goal of being able to work on a wide range of systems. Small computing systems with limited capacity to...
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A comparison of an evolvable hardware controller with an artificial neural network used for evolving the gait of a hexapod robot
This paper investigates the implementation of a novel evolvable hardware controller used in evolutionary robotics. The evolvable hardware consists of...
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FPGA-based acceleration architecture for Apache Spark operators
Apache Spark has been the most popular in-memory processing framework for big data applications deployed in data centers. As a CPU-only parallel...
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Privacy and security federated reference architecture for Internet of Things
Physical objects are getting connected to the Internet at an exceptional rate, making the idea of the Internet of Things (IoT) a reality. The IoT...
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Hardware-Aware Evolutionary Explainable Filter Pruning for Convolutional Neural Networks
Filter pruning of convolutional neural networks (CNNs) is a common technique to effectively reduce the memory footprint, the number of arithmetic...
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A Folded Architecture for Hardware Implementation of a Neural Structure Using Izhikevich Model
Neuromorphic systems are expected to equip a new paradigm in computation so that energy efficient, intelligent systems could be implemented easily....
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Performance and Efficiency Exploration of Hardware Polynomial Multipliers for Post-Quantum Lattice-Based Cryptosystems
The significant effort in the research and design of large-scale quantum computers has spurred a transition to post-quantum cryptographic primitives...
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Quality-power configurable flexible coding order hardware design for real-time 3D-HEVC intra-frame prediction
The emerging of 3D video-capable embedded mobile devices is expected due to the popularization of multimedia services and the demand for novel...
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Hardware acceleration of YOLOv7-tiny using high-level synthesis tools
FPGAs have emerged as a promising platform for implementing neural networks due to their reconfigurability, parallelism, and low power consumption....
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Green Hardware Infrastructure for Algorithmic Trading
Every software needs hardware to be run on. Nowadays we encounter urgent need to mitigate the adverse effects of climate change. It prompted a...
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A Custom Hardware Architecture for the Link Assessment Problem
Heterogeneous accelerator enhanced computing architectures are a common solution in embedded computing, mainly due to the constraints in energy and...
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Hardware acceleration for object detection using YOLOv4 algorithm on **linx Zynq platform
With the technological improvement in artificial intelligence, particularly deep learning is providing effective outcomes along with hardware...
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Trojan awakener: detecting dormant malicious hardware using laser logic state imaging (extended version)
The threat of (HTs) and their detection is a widely studied field. While the effort for inserting a Trojan into an (ASIC) can be considered...
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Optimization of the structural complexity of artificial neural network for hardware-driven neuromorphic computing application
This work focuses on the optimization of the structural complexity of a single-layer feedforward neural network (SLFN) for neuromorphic hardware...
