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  1. No Access

    Chapter and Conference Paper

    The Optimization and Parallelization of Two-Dimensional Zigzag Scanning on the Matrix

    With the expansion of applications, such as image processing, scientific computing, numerical simulation, biomedicine, social network and so on, enormous quantities of data need to be crunched in order to get ...

    Ling Li, Yaobin Wang, Lijuan Peng… in Artificial Neural Networks and Machine Lea… (2023)

  2. No Access

    Chapter and Conference Paper

    Rgs-SpMM: Accelerate Sparse Matrix-Matrix Multiplication by Row Group Splitting Strategy on the GPU

    The Sparse Matrix-Matrix Multiplication (SpMM) operation is widely used in different fields, especially the recently popular GNN framework. Researchers have designed many kernels on the GPU to accelerate the S...

    Mingfeng Guo, Yaobin Wang, Jun Huang, Qingfeng Wang… in Network and Parallel Computing (2022)

  3. No Access

    Chapter and Conference Paper

    The Parallelization and Optimization of K-means Algorithm Based on MGPUSim

    Although the k-means algorithm has been parallelized into different platforms, it has not yet been explored on multi-GPU architecture thoroughly. This paper presents a study of parallelizing k-means on a novel...

    Zhangbin Mo, Yaobin Wang, Qingming Zhang… in Artificial Neural Networks and Machine Lea… (2022)

  4. No Access

    Chapter and Conference Paper

    Optimization and Analysis of Parallel Back Propagation Neural Network on GPU Using CUDA

    Graphic Processing Unit (GPU) can achieve remarkable performance for dataset-oriented application such as Back Propagation Network (BPN) under reasonable task decomposition and memory optimization. However, ad...

    Yaobin Wang, **** Tang, Hong An, Zhiqin Liu, Kun Wang… in Neural Information Processing (2015)

  5. No Access

    Chapter and Conference Paper

    Parallelizing Block Cryptography Algorithms on Speculative Multicores

    Although block cryptography algorithms have been parallelized into different platforms, they have not yet been explored on speculative multicore architecture thoroughly, especially under CBC, CFB and OFB modes...

    Yaobin Wang, Hong An, Zhiqin Liu, Lei Zhang… in Algorithms and Architectures for Parallel … (2015)

  6. No Access

    Chapter and Conference Paper

    Dynamic Resource Tuning for Flexible Core Chip Multiprocessors

    Technology evolving has forced the coming of chip multiprocessors (CMP) era, and enabled architects to place an increasing number of cores on single chip. For the abundance of computing resources, a fundamenta...

    Yongqing Ren, Hong An, Tao Sun, Ming Cong… in Algorithms and Architectures for Parallel … (2010)

  7. No Access

    Chapter and Conference Paper

    Balancing Thread Partition for Efficiently Exploiting Speculative Thread-Level Parallelism

    General-purpose computing is taking an irreversible step toward on-chip parallel architectures. One way to enhance the performance of chip multiprocessors is the use of thread-level speculation (TLS). Identify...

    Yaobin Wang, Hong An, Bo Liang, Li Wang… in Advanced Parallel Processing Technologies (2007)