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    Chapter and Conference Paper

    A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development

    A novel configuration bitstream generation tool for a custom FPGA platform is presented. It can support a variety of devices of similar architecture. The tool exhibits technology independence and is easily mod...

    K. Siozios, G. Koutroumpezis, K. Tatas in Field Programmable Logic and Application (2004)

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    Chapter and Conference Paper

    Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations

    A run-time reconfiguable array of multipliers architecture is introduced. The novel multiplier can be easily reconfigured to trade bitwidth for array size, thus maximizing the utilization of available hardware...

    G. Koutroumpezis, K. Tatas, D. Soudris in Field-Programmable Logic and Applications:… (2002)