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Article
A personalized insertion centers preoperative positioning method for minimally invasive surgery of cruciate ligament reconstruction
In the surgery of knee cruciate ligament repair, how to accurately and personalized obtain cruciate ligament insertion centers is the key issue and a great challenge for surgeons. Current artificial judgment i...
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Article
Computationally Efficient Architecture for Accurate Frequency Estimation with Fourier Interpolation
A simplified DFT-based algorithm and its VLSI implementation for accurate frequency estimation of single-tone complex sinusoid signal are investigated. The proposed algorithm estimates frequency by interpolati...
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Chapter and Conference Paper
Enhanced Implementation of Max ∗ Operator for Turbo Decoding
Max ∗ operator is the kernel operation in MAP decoding. An intuitive approximation to the correction term of max ∗ operator is presented. The binary-tree based architecture for multi-variable max ∗ calculation...
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Chapter and Conference Paper
Map** Loops onto Coarse-Grained Reconfigurable Array Using Genetic Algorithm
Coarse-grained reconfigurable array (CGRA) is a competitive hardware platform for computation intensive tasks in many application domains. The performance of CGRA heavily depends on the map** algorithm which...
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Chapter and Conference Paper
A Novel CGRA Architecture and Map** Algorithm for Application Acceleration
Coarse grained reconfigurable array (CGRA) is an architecture which offers hardware like high performance and software like flexibility. The two characteristics make CGRA an effective candidate for computation...
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Chapter and Conference Paper
Ant Colony Optimization for Application Map** in Coarse-Grained Reconfigurable Array
Coarse-grained reconfigurable array (CGRA) is an efficient architecture in digital signal processing domain. It is one of the best candidate architectures to exploit instruction level and loop level parallelis...
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Chapter and Conference Paper
VLSI Design of a Hardware Efficient FFT Processor
This paper presents a CORDIC-based radix-4 FFT processor, which adopts an improved conflict-free parallel memory access scheme and the pipelined CORDIC architecture. By generating the twiddle factor correctly,...