VLSI-SoC: Technology Advancement on SoC Design
29th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2021, Singapore, October 4–8, 2021, Revised and Extended Selected Papers
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Article
Open AccessThe ASHES 2021 special issue at JCEN
This brief editorial gives a short, two-page overview of the ASHES 2021 workshop. It shall serve as an introduction for this special issue at JCEN.
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Article
Open AccessThe ASHES 2020 special issue at JCEN
This editorial provides its readers with a brief introductory overview of the ASHES workshop series in general, and of this special ASHES 2020 issue at the Journal of Cryptographic Engineering (JCEN) in partic...
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Book and Conference Proceedings
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Article
Open AccessThe ASHES 2019 special issue at JCEN
This brief editorial gives a short, two-page overview of the ASHES 2019 workshop. It shall serve as an introduction for this special issue at JCEN.
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Article
Open AccessA large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm **linx FPGAs
Lightweight implementation of security primitives, e.g., physical unclonable functions (PUFs) and true random number generator, in field programmable gate array (FPGA) is crucial replacement of the conventiona...
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Article
Open AccessHalide perovskite memristors as flexible and reconfigurable physical unclonable functions
Physical Unclonable Functions (PUFs) address the inherent limitations of conventional hardware security solutions in edge-computing devices. Despite impressive demonstrations with silicon circuits and crossbar...
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Book
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Book
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Chapter
Fault-Tolerant Computing in Redundant Residue Number System
The semiconductor industry is aggressively gearing towards device node miniaturization to accommodate the unceasing demands for low power and high speed computing. This inexorable trend of device scaling escal...
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Chapter
Design and Evaluation of Booth-Encoded Multipliers in Redundant Binary Representation
Redundant binary (RB) representation possesses some figures of merit as an internal format for the design of datapath components due to its carry-free property and avoidance of sign extension. Being a non-clas...
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Chapter
Double-Base Number System and Its Application in FIR Filter Design
The electronic industry has witnessed a phenomenal growth over the last two decades, mainly due to the rapid advancement of very-large-scale integration technology. The number of integrated circuits has been r...
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Book
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Chapter
Hardware IP Watermarking and Fingerprinting
The continuously increasing gap between silicon and designer productivity has created a need for common design reuse. The initial response to this need emphasized the enforcement of designers’ rights through t...
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Chapter
Secure Licensing of IP Cores on SRAM-Based FPGAs
The rapid increase in FPGA devices’ capacity has enabled the implementation of complete sophisticated systems. The widening design productivity gap and shrinking time-to-market window have made licensing of ex...
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Chapter
Design and Implementation of High-Quality Physical Unclonable Functions for Hardware-Oriented Cryptography
Physical Unclonable Functions have emerged as effective primitives for varieties of security applications. With the advent of mobile computing, designing and implementing high-quality PUFs for resource-constra...
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Chapter
Self Organizing Feature Map for Color Quantization on FPGA
This chapter presents an efficient architecture of Kohonen Self-Organizing Feature Map (SOFM) based on a new Frequency Adaptive Learning (FAL) algorithm which efficiently replaces the neighborhood adaptation f...
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Book and Conference Proceedings
Advances in Computer Systems Architecture
10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005. Proceedings
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Chapter and Conference Paper
VLSI Performance Evaluation and Analysis of Systolic and Semisystolic Finite Field Multipliers
Finite field multiplication in GF(2 m ) is an ineluctable operation in elliptic curve cryptography. The objective of this paper is to survey fast and efficient hardware implement...
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Article
Properties and calculation of Paired Haar transform
Different properties of recently introduced Paired Haar transform have been shown. Nonpolynomial Haar Pxpansion of incompletely specified Boolean functions has been presented. Based on the above properties and...
