Page
%P
-
Chapter and Conference Paper
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations
A run-time reconfiguable array of multipliers architecture is introduced. The novel multiplier can be easily reconfigured to trade bitwidth for array size, thus maximizing the utilization of available hardware...
-
Chapter and Conference Paper
A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development
A novel configuration bitstream generation tool for a custom FPGA platform is presented. It can support a variety of devices of similar architecture. The tool exhibits technology independence and is easily mod...