1 Introduction

Better technology, reduced cost, and efficient system are encouraging greening the grid. In the present time, distributed generators are inevitably integrated with the utility grid to meet the increasing power demands. The integration of such a generator must follow the grid code requirement to give and take power from the grid.

Solar inverter system comprises an array of solar panels, DC/DC converter, and DC/AC converter, and both are coupled with the help of DC link capacitor as shown in Fig. 1.

Fig. 1
figure 1

A grid-tied solar inverter system

Full size image

This solar inverter is connected to the power utility grid system through LCL filters. Output ac power is filtered by the LCL filter to mitigate the harmonics and feed to the grid. Current control strategies play a vital role in the performance of distributed solar power system. An overview of power converters and their various topologies is depicted in [1]. A comparative study is being carried out for PI and PR controller by [2, 3]. Inverters in distributed power generation (DG) systems include dc–ac conversion, output power quality assurance, various protection mechanisms, and system controls [4]. To compensate the grid harmonics and provide disturbance rejection capability, stationary-frame generalized integrators are used to control the fundamental current [5]. A low-cost grid-connected residential scheme is suggested in [6] based on dynamic voltage or current error signals activating a PI controller. Another controller used is low-pass filter in the feedback path along with harmonic compensator to improve the grid current quality [7]. Proportional resonant (PR) controller is an algorithm used in the current controller which is used to integrate the PV inverter into the grid.

A repetitive control strategy is implemented to claim a superior tracking and harmonic rejection capability by applying mu synthesis principle [8]. Detailed investigation on power control and current control strategies has been elaborated in [9,10,11,12]. Various control algorithms are presented for active and reactive power control when PV inverters are connected to the grid as given by [13,14,15,16]. An improved DSP-based controller with predictive and fuzzy logic-based current controller is investigated in [17]. The contribution of power electronics on the efficiency improvement and current harmonics reduction in the grid-connected photovoltaic system is described in [18,19,20,21]. The transformerless PV inverter is explained, to minimize the DC component on the injected AC current [22]. Various control strategies, optimization techniques, and analysis have been investigated to implement current control algorithms [23,24,25,26,27,28]. A comprehensive design methodology of PR controller with zero steady-state error for single-phase grid-connected system is presented by [29]. This paper proposes a novel design and modeling of the current controller for single-phase grid-connected inverter system. The main functional blocks are shown in Fig. 2.

Fig. 2
figure 2

Functional block of inverter with current controller

Full size image

2 Proposed current controller for DC/AC module

The current controller algorithm (CCA) is part of the DC/AC Module. The current controller reads the grid voltage, phase, frequency, and generates the electrical power based on the solar panel input power and DC link voltage. Inverter power is fed to the grid in phase with the grid voltage. The proposed current controller comprises zero crossing detector for phase and frequency of the grid voltage. Reference current calculation is done to deliver maximum available power to the grid. The instantaneous reference current is generated using the reference current sine wave generator. The current delivered to the grid is measured through feedback. PR controller is used to compute PWM duty cycle from the error current.

3 Modeling and simulation of current controller

The current controller is the critical functionality of the DC/AC module and is executed for every sample time Ts. The Simulink model of the current controller is shown in Fig. 3. In this model, the current reference calculation is done for every half cycle that is used for generation of instantaneous reference current sine wave. So, generated instantaneous current sine wave is compared with the feedback current, and error is fed to the PR controller. The output of the PR controller is decoupled with UDC by dividing the URegCC value with UDC link voltage. The current controller outputs the PWM duty cycle value in the range of 0–65, 535 in each direction of the sine wave.

Fig. 3
figure 3

Current controller model

Full size image

The current reference offset in current reference generation is not used in the model and grid resistance compensation is not included in the model.

Zero crossing detector (ZCD) detects the zero crossings of grid voltage measured at Point of Common Coupling (PCC). ZCD executes every sample time, Ts. Input samples are downsized by 5*Ts and select the median value out of 3 successive inputs. The predictive FIR filter is a digital filter to predict the next sample from the previous consecutive 11 inputs. The output of the predictive FIR filter is interpolated to get 4 intermediate samples. The interpolated samples are verified for the zero crossing and the corresponding cycle time is used for computing the grid frequency. The output of the ZCD is shown in Fig. 4. The number of samples for every cycle is fixed as 170. The minor variation in grid frequency is handled by changing the sampling time. For every grid voltage cycle, the new sampling time is manipulated.

$${\text{Sampling}}{\mkern 1mu} {\text{Time}},{\mkern 1mu} Ts{\mkern 1mu} = {\mkern 1mu} {\text{Grid}}{\mkern 1mu} {\text{Frequency}}{\mkern 1mu} /{\mkern 1mu} 170.$$
Fig. 4
figure 4

Output of ZCD

Full size image

The RMS value of the reference current is calculated for every half cycle of grid voltage. Panel power (Ppv) from DC/DC board through CAN communication, DC link voltage (Udclink), grid voltage (Ugrid) are used for computing current reference (IoutRefRMS) in current controller algorithm.

Feedback current for the current controller is measured from the negative H-bridge of the DC/AC switching circuit. Current in the negative H-bridge is discontinuous DC because of PWM switching. There is no filter involved in the feedback measuring circuit and it is mandatory to sample the current in the middle of the PWM duty cycle to ensure the average current measurement for each PWM pulse. This synchronization of current ADC and H-bridge PWM is available in the DSP processor and explicitly brought out in the Matlab model. The sampled current is converted to sinusoidal wave by considering the polarity of the grid voltage and thus represents the current feedback to the current controller of the inverter. This current feedback is compared with the current reference to compute the current error. This current error from reference is given as input to the PR controller.

PR controller is the inner loop controller, the output is based on the error current value, that means it estimates the output voltage along with the harmonic compensators. It has 1st, 3rd, 5th, and 7th harmonic compensators with a frequency of 50 Hz, 150 Hz, 250 Hz, and 350 Hz, respectively. Based on the current error value, the highest frequency of the resonant controller will be chosen. Modeling of proportional resonant (PR) controller is shown in Fig. 5.

Fig. 5
figure 5

PR controller

Full size image

PR controller block has the advantage of visualizing the outputs of each harmonic compensator. Harmonic components HC5 and Harmonics components HC7 are subjected to anti-windup to limit the peak output. PR controller is discretized using the Backward and Backward Euler method and used in the discretized method as can be seen from Eq. 1.

$${\text{Harmonic}}\;{\text{Compensator}}\;{\text{Rb}}\;\& \;b\left( Z \right) = \frac{{T_{s} \left( {1 - Z^{{ - 1}} } \right)}}{{1 + \left( {\omega _{0}^{2} T_{s}^{2} - 2} \right)Z^{{ - 1}} + Z^{{ - 2}} }}.$$
(1)

In Fig. 6, the outputs of each harmonic compensator are probed. From Fig. 6, it is observed that the amplitude of fundamental frequency is much higher than the 3rd, 5th, and 7th order frequencies.

Fig. 6
figure 6

Output of PR controller

Full size image

DC link voltage is decoupled from PR controller output by dividing the PR controller output by DC link voltage.

Figure 7 shows the cumulative output of the proportional controller and Harmonic compensators (HC1, HC3, HC5, and HC7).

Fig. 7
figure 7

Consolidated output of PR controller

Full size image

DSP calculates the duty cycle from the CCA and generates PWM pulses to trigger the H-bridge gate as shown in Fig. 8. DC link voltage source forms DC input to the H-bridge.

Fig. 8
figure 8

H-bridge circuit in PLECS

Full size image

PWM carrier frequency is twice as that of the sampling frequency. For every sampling time (8.5 kHz approx.), the current control algorithm computes the duty cycle based on the error current and generates PWM pulses of 17 kHz. Zero crossing detection calculates frequency for every period (grid voltage) and this decides the PWM frequency for the next cycle.

Feedback current sensor is mounted on the negative H-bridge. Feedback current is discontinuous and there is no filter available in the current sensor measuring circuit. DSP is expected to read feedback current when the PWM gate is switched ON and also at the mid of the PWM pulse to ensure the read value is average feedback current. Feedback current is measured in mid of the second PWM pulse. Time delay of 0.75*Ts is involved in reading the feedback current from the PWM output.

Feedback current is calculated by ADC quantizer as shown in Fig. 9. Feedback current module samples the current in the mid of the PWM pulse on negative H-bridge. The sampled current is quantized as 10-bit values in the scale of -52.03A to + 52.03 A (for 5.4 kW). Figure 10 shows the current input and current output of the feedback current module. Since the current is measured in the negative H-bridge, the current is unidirectional, and sign conversion is required for the negative cycle of the sine wave.

Fig. 9
figure 9

ADC quantizer for feedback current

Full size image
Fig. 10
figure 10

Input and output of current feedback

Full size image

Figure 11 illustrates the reference current, feedback current, and the error current. Table 1 shows the time-domain characteristics of the error current. The error current is high for the first cycle and in steady state, the average error reads out 9 × 52.03 / 1024 = 457 mA (Scaling + 52.03A—1024). Figure 12 shows the feedback current measured at the negative H-bridge, the input side of the inverter circuit. From this current, the average current is estimated, and feedback current is calculated.

Fig. 11
figure 11

Reference current, feedback current, and error current

Full size image
Table 1 Error current—characteristics
Full size table
Fig. 12
figure 12

Feedback current waveform observed from negative H-bridge

Full size image

The average current along with feedback current is shown in Fig. 13.

Fig. 13
figure 13

Feedback and average current waveforms observed from negative H-bridge

Full size image

Figure 14 explains how the average current sampled at mid of PWM pulse width and then it is fed back as current feedback signal to the current controller.

Fig. 14
figure 14

Zoomed current waveform from negative H-bridge

Full size image

LCL filter is connected across the inverter output to filter out the current harmonics while power flows from inverter to power grid. Figure 15 shows the power circuit of the LCL filter. The current control loop of the LCL filter is shown in Fig. 16.

Fig. 15
figure 15

LCL filter circuit

Full size image
Fig. 16
figure 16

Current control loop of LCL filter circuit

Full size image

LCL filter circuit parameters are detailed in Table 2

Table 2 LCL filter circuit parameters
Full size table

4 Simulation results

When relay connects the inverter to the grid, the initial inverter voltage is set based on the previous half cycle of grid voltage as shown in Fig. 17. The grid voltage is loaded to the initial value in PR controller to ensure the initial inverter voltage to match the grid voltage. In simulation, reference current is made to 5.4 kW, and the maximum overshoot is absorbed to be 46%. In practice, initial power delivered is limited and increases in step to reach the maximum rated power.

Fig. 17
figure 17

Grid voltage and inverter output current

Full size image

The inverter output voltage, output current, and output power at steady-state condition are shown in Fig. 18. In Fig. 18, RMS values of voltage, current, and power are taken to explain the stability of the inverter. From this figure, it has been observed that the RMS value of the voltage at steady-state condition is 230 V and the RMS value of current at steady-state condition is 23.5 A and the RMS power is 5.4 kW. Multiplication of voltage and current values is observed from the graph shown in Fig. 18. The other simulation results are described in Table 3.

Fig. 18
figure 18

Simulink output

Full size image
Table 3 Simulation results for 5.4 kW inverter specification
Full size table

[

5 Experimental implementation and results

Experimental implementation of the current controller in the DC/AC converter circuits with LCL filter for a single-phase bidirectional inverter system is done and results are obtained. The proposed algorithm is implemented using 32-bit fixed-type TMS320F2812 DSP processor. The current controller reads the grid voltage, phase, frequency, and generates the electrical power based on the solar panel input power and DC link voltage. Inverter power is fed to the grid in phase with the grid voltage. H-bridge along with the filter converts the DC into AC specified by the grid parameters. STPOWER V channel 600 V IGBT suitable for solar inverter application is used as bridge. IGBT gates are driven by the PWM signals generated by DSP and isolated using gate drive optocoupler HCPL3120 which can source a minimum of 2A peak output current. Signal conditioning circuits are used to feed the DC voltage, inverter voltage/frequency, and the grid voltage/frequency to the DSP for feedback and control purposes. Also, the current through the power module and temperature of the power module have been measured by the DSP. ENS functionality is added using microcontroller. ENS monitors the grid voltage and frequency and controls the output relay which connects the inverter to the grid. ENS communicates with DSP through dedicated serial interface.

The current following through the H-bridge has been measured through a sense resistor of value 7.5mΩ. The voltage across 7.5mΩ has been amplified with a gain of ~ 8.15, which is then compared against the limit to disable the PWM signals during over current or reverse current flow.

PWM_HALT, a halt signal, is activated when the current through the power modules exceeds 60A or when there is reverse current flow beyond 44A in the power modules. The output of the sensor is shown in Fig. 19.

Fig. 19
figure 19

PWM_HALT signal and current sense waveforms

Full size image

The DC/AC inverter is based on an H-bridge converter as shown in Fig. 20. The output is connected to the utility in a single-phase configuration through an LCL filter.

Fig. 20
figure 20

H-bridge of DC/AC board

Full size image

The switching frequency has been measured as 17 kHz. Gate drive signals of H-bridge circuit are shown in Fig. 21. Figure 22 shows the DC link voltage concerning the positive polarity of the input voltage. Voltage is measured from the experimental setup and then it was plotted. The inverter output is connected to the grid utility through LCL filter in a single-phase configuration. Table 4 shows the LCL filter parameters and the parameters of the grid and inverter used for the experimental setup. The power flows in bidirectional mode that is to and from the grid to regulate the grid voltage at PCC (Point of Common Coupling). Fig. 23 illustrates distortion data received from spectrum analyzer; the THD% magnitude of the fundamental grid current injected into the grid is around 1.95% by employing PR controller, harmonic compensator, and LCL filter. The injected distortion in the grid current is well below IEEE 1547 Standards.

Fig. 21
figure 21

Gate drive signals of H-bridge

Full size image
Fig. 22
figure 22

DC link voltage as measured and plotted

Full size image
Table 4 LCL and system parameter
Full size table
Fig. 23
figure 23

Harmonic order of the grid current injected

Full size image

The resonance of the filter is dampened by suitably choosing the LCL parameter in the control loop circuit and stability margin is considered for resonance frequency.

Experimental results are shown in Figs. 24, 25, and 26 which depicts voltage and current waveforms captured when the inverter is connected to the grid along with LCL filter. Voltage and current of the grid are observed using PR controller for different values of pick to pick current. It is clearly observed that grid voltage and current closely matches the estimated voltage and current of the model with high tracking capability and zero steady-state error. Ripple attenuation of the grid current gets much better with proper tuning of LCL filter. It is also evident that the percentage of harmonics in the grid current is within limits of grid code standards at different current values (Fig. 27).

Fig. 24
figure 24

Voltage and current waveforms measured from inverter circuit

Full size image
Fig. 25
figure 25

Experimental voltage and current waveforms from DC/AC circuit

Full size image
Fig. 26
figure 26

Voltage and current waveforms from DC/AC circuit

Full size image
Fig. 27
figure 27

Bode plot for LCL filter

Full size image

The stability of the LCL filter has also been tested by designing the control loop of the filter and further tested the stability margin with an ideal dam** resistor value. Stability analysis of the LCL filter is done and the results are obtained. Figure 26 shows the Bode plot of the LCL filter where phase and magnitude are plotted. At Lgrid = 325mH, the FF closed loop has a large gain and at the same time a 180° phase shift. Experimental test setup of the solar inverter is shown in Fig. 28a, b.

Fig. 28
figure 28

a Experimental test setup of solar inverter. b DC/AC inverter module in experimental setup

Full size image

6 Conclusion

DC/AC inverter circuit is modeled and simulated in this paper. Analysis has been carried out with detailed circuit design. Simulink model for the current control algorithm is designed for 5.4 KW with certain limitations in the model. Detailed circuit design and analysis have been carried out in this paper and the proposed design is validated. The proposed model describes the procedure and control strategy of current controller with output filter for single-phase two-directional grid-connected inverter system. To mitigate the switching ripple distortion to the grid, the filter parameters were carefully selected. It is observed that the inverter output with the proposed current controller with filter has better tracking capabilities, less ripple injected to grid, zero steady-state error, and strictly adheres to the grid code standard. The distortion is well below 5%. The model needs to be enhanced for additional analysis like the ride-through and effect of changes in grid impedance.