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Article
Design for Testability Features of Godson-3 Multicore Microprocessor
This paper describes the design for testability (DFT) challenges and techniques of Godson-3 microprocessor, which is a scalable multicore processor based on the scalable mesh of crossbar (SMOC) on-chip network...
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Article
Parallel Error Detection for Leading Zero Anticipation
The algorithm and its implementation of the leading zero anticipation (LZA) are very vital for the performance of a high-speed floating-point adder in today’s state of art microprocessor design. Unfortunately,...