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Contributions from the “Best of ICCAD” to Synopsys
This paper highlights some examples of contributions from the selected ICCAD papers to Synopsys. We do not attempt to be exhaustive. Given the breadth of the topics addressed at ICCAD and the number of product...
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Design Technology for Systems-on-Chip
Advancing technology impacts design along several vectors. Interconnect delay became dominant in many designs at 0.18µm; to obtain timing closure, it was necessary to unify synthesis and placement. Moving forw...
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Modeling and Synthesis of Behavior, Control and Data Flow
To tackle the exponential growth in the complexity of digital circuits, designers are moving to higher levels of abstraction in the design process. This chapter surveys the state of the art in modeling and syn...
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Hardware Description Languages in Practical Design Flows
Modern design of digital microelectronics is unthinkable without hardware description languages (HDL). HDLs are used at several points in the design flow. Designs are typically captured in an HDL at the behavi...
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Article
VLIW Processor Codesign for Video Processing
A codesign approach for complex video compression systems is presented. The system is based on a flexible and programmable VLIW (Very Long Instruction Word) architecture. The design approach can be subdivided ...
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Article
Embedded system design
In the past decade the main engine of electronic design automation has been the widespread application of ASICs (Application Specific Integrated Circuits). Present technology supports complete systems on a chi...
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Book
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Book
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Stanford’s Flamel System
The Flamel system was Trickey’s thesis work at Stanford University. Flamel includes transformations, scheduling, and data path synthesis.
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Univ. of California at Berkeley’s Synthesis System
The University of California at Berkeley’s synthesis system includes transformations, scheduling and data path synthesis.
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Univ. of Paderborn’s PARBUS System
The University of Paderborn’s PARBUS system includes scheduling, partitioning, and data path synthesis. The system is aimed at producing designs with two partitioned buses.
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Univ. of Texas at Austin’s DAGAR System
The DAGAR system was Raj’s thesis work at the University of Illinois at Urbana-Champaign, and is being continued at the University of Texas at Austin. DAGAR includes scheduling and data path synthesis.
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Carnegie Mellon’s Facet / Emerald System
The Facet design methodology, and its implementation as the Emerald system (actually Emerald I and Emerald II), was Tseng’s thesis work at CMU. Facet/Emerald includes scheduling and data path synthesis. See also
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Carleton’s Elf System
The Elf system was Girczyc’s thesis work at Carleton University; it was further refined at Audesyn Inc. Elf includes scheduling and data path synthesis.
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IMEC’s CATHEDRAL-III System
IMEC’s CATHEDRAL-III system is one of two successors to the CATHEDRAL-II system. It is designed for the synthesis of high-throughput chips for audio, image, and video applications, and it supports application-...
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NTT’s HARP System
NTT’s HARP (Hardware Architecture Ruling Processor) system includes scheduling and data path synthesis.
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Siemens’ Synthesis System
Siemens’ synthesis system includes partitioning, data path synthesis and scheduling.
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Univ. of California at Berkeley’s HYPER System
The University of California at Berkeley’s HYPER system is aimed at synthesizing real-time applications, and includes transformations, scheduling, data path synthesis, module binding, and controller design.
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Univ. of Waterloo’s CATREE System
The University of Waterloo’s CATREE (Computer aided tree) system includes scheduling and data path synthesis.
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Chapter
Case Western’s ADPS System
Case Western Reserve University’s ADPS (A Data Path Synthesizer) system includes scheduling and data path synthesis.
