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    Chapter

    Ultralow-Voltage Memory Circuits

    The key design issues for ultralow-voltage (0.5–2 V) memory circuits are reviewed in terms of stable memory-cell operation, subthreshold current reduction, suppression of or compensation for design-parameter v...

    Kiyoo Itoh in Design of System on a Chip (2004)

  2. Chapter

    Low-Voltage Embedded-RAM Technology: Present and Future

    First, key issues for low-voltage (<1V) embedded RAMs are summarized in terms of stable operation, suppression of leakage (gate-tunneling/subthreshold) currents, and speed variation of memory cells and periphe...

    Kiyoo Itoh, Hiroyuki Mizuno in SOC Design Methodologies (2002)

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