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Chapter and Conference Paper
An Asymptotic Parallel Linear Solver and Its Application to Direct Numerical Simulation for Compressible Turbulence
When solving numerically partial differential equations such as the Navier-Stokes equations, higher-order finite difference schemes are occasionally applied for spacial descretization. Compact finite differenc...
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Chapter and Conference Paper
File I/O Cache Performance of Supercomputer Fugaku Using an Out-of-Core Direct Numerical Simulation Code of Turbulence
Turbulent flows play important roles in many flow-related phenomena that appear in various fields. However, despite numerous studies on turbulence, the nature of turbulence has not yet been fully clarified. Di...
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Chapter and Conference Paper
Analysis of Precision Vectors for Ising-Based Linear Regression
Quantum computing has been much attention as one of the new computational principles. In particular, annealing machines that use the Ising model of statistical mechanics are emerging and feasible next-generati...
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Chapter and Conference Paper
A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders
A hardware video encoder based on recent video coding standards such as HEVC and VVC needs to efficiently handle a massive number of memory accesses to search motion vectors. To this end, first, this paper pre...
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Article
VGL: a high-performance graph processing framework for the NEC SX-Aurora TSUBASA vector architecture
Develo** efficient graph algorithms implementations is an extremely important problem of modern computer science, since graphs are frequently used in various real-world applications. Graph algorithms typical...
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Chapter and Conference Paper
Optimizations of DNS Codes for Turbulence on SX-Aurora TSUBASA
Direct numerical simulations (DNSs) of incompressible turbulence have been performed since the late 1960s, but simulations that reproduce strongly nonlinear turbulent flows as in the real-world have not been r...
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Chapter and Conference Paper
A Deep Reinforcement Learning Based Feature Selector
In the field of data mining and machine learning, it is a challenge for researchers and engineers to analyze and classify the high-dimensional data. In order to minimize the classification error, it is critica...
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Chapter and Conference Paper
A Dynamic Parameter Tuning Method for High Performance SpMM
Sparse matrix-matrix multiplication (SpMM) is a basic kernel that is used by many algorithms. Several researches focus on various optimizations for SpMM parallel execution. However, a division of a task for pa...
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Chapter and Conference Paper
Optimization of the Himeno Benchmark for SX-Aurora TSUBASA
This paper focuses on optimizing the Himeno benchmark for the vector computing system SX-Aurora TSUBASA and analyzes its performance in detail. The Vector Engine (VE) of SX-Aurora TSUBASA achieves a high memor...
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Chapter and Conference Paper
Performance Evaluation of SX-Aurora TSUBASA and Its QA-Assisted Application Design
In this article, we present an overview of our on-going project entitled, R&D of a Quantum-Annealing Assisted Next Generation HPC Infrastructure and its Applications. We describes our system design concept of a n...
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Chapter and Conference Paper
Performance Evaluation of SX-Aurora TSUBASA by Using Benchmark Programs
This paper evaluates the basic performance of the latest vector supercomputer, SX-Aurora TSUBASA, in order to clarify its potential. First, the memory bandwidth, which is one of the features of SX-Aurora TSUBA...
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Chapter and Conference Paper
Develo** an Efficient Vector-Friendly Implementation of the Breadth-First Search Algorithm for NEC SX-Aurora TSUBASA
Breadth-First Search (BFS) is an important computational kernel used as a building-block for many other graph algorithms. Different algorithms and implementation approaches aimed to solve the BFS problem have ...
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Article
Develo** Efficient Implementations of Shortest Paths and Page Rank Algorithms for NEC SX-Aurora TSUBASA Architecture
The main goal of this paper is to demonstrate that the newest generation of NEC SX-Aurora TSUBASA architecture can perform large-scale graph processing extremely efficiently. This paper proposes approaches, wh...
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Chapter and Conference Paper
Performance Evaluation of Tsunami Inundation Simulation on SX-Aurora TSUBASA
As tsunamis may cause damage in wide area, it is difficult to imme...
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Chapter and Conference Paper
Analysis of Relationship Between SIMD-Processing Features Used in NVIDIA GPUs and NEC SX-Aurora TSUBASA Vector Processors
This paper presents comprehensive analysis of main SIMD-processing features and computational characteristics of three high performance architectures: two NVIDIA GPU architectures (of Pascal and Volta generati...
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Article
Open AccessPotential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE
Achieving a high sustained simulation performance is the most important concern in the HPC community. To this end, many kinds of HPC system architectures have been proposed, and the diversity of the HPC system...
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Chapter and Conference Paper
Directive Translation for Various HPC Systems Using the Xevolver Framework
This paper proposes a directive translation approach that translates a special placeholder to different directives, depending on the target HPC system. The special placeholder in an application code is used as...
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Chapter and Conference Paper
Performance Evaluation of an OpenMP Parallelization by Using Automatic Parallelization Information
To exploit the potential of many core processors, a serial code is generally optimized for a particular compiler called a target compiler, so that the compiler can understand the code structure for automatic p...
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Chapter and Conference Paper
Code Optimization Activities Toward a High Sustained Simulation Performance
Rapid evolutions of HPC systems bring us a high computational capability. However, it is getting harder to exploit the potential of a HPC system due to the increases in system complexity. To create significant...
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Chapter and Conference Paper
Designing an HPC Refactoring Catalog Toward the Exa-scale Computing Era
Aiming at kee** performance portability of practical applications even in the exascale computing era, this paper presents a concept of HPC refactoring, and the design of the HPC refactoring catalog. The HPC ...