-
Article
Open AccessLow-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique
In this work, we present a gate-all-around (GAA) low-temperature poly-Si nanowire (NW) junctionless device with TiN/Al2O3 gate stack using an implant-free approach. Since the source/drain and channel regions are ...
-
Article
Open AccessA junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires
In this paper, a silicon-oxide-nitride-silicon nonvolatile memory constructed on an n+-poly-Si nanowire [NW] structure featuring a junctionless [JL] configuration is presented. The JL structure is fulfilled by em...
-
Article
Fabrication and Characterization of Poly-Si Schottky-Barrier Thin-Film Transistors
Poly-Si Schottky-barrier thin-film transistors (SB-TFTs) were fabricated and characterized. In this study, SB-TFTs were first fabricated by using a conventional sidewall spacer to isolate the gate and S/D regi...
-
Article
Dependences of Structural Parameters on the Characteristics of Poly-Si Thin-Film Transistors after Plasma Passivation
The effects of NH3 and H2 plasma passivation on the characteristics of poly-Si thin-film transistors with source/drain extensions induced by a bottom sub-gate were studied. Our results show that significant impro...
-
Article
Breakdown Characteristics of Ultra-Thin Gate Oxides Caused by Plasma Charging
Breakdown characteristics of ultra-thin gate oxides caused by plasma charging were studied in this work. It is observed that as oxide thickness is scaled down to 4 nm, some traditional monitor parameters may l...