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Chapter and Conference Paper
Construction of Group Rules for VLSI Application
An application of cellular automata (CA) has been proposed for building parallel processing systems, cryptographic hashing functions, and VLSI technology. Recently, Das et al. have reported characterization of...
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Chapter and Conference Paper
Pseudorandom Number Generation Using Cellular Automata
High-performance pseudorandom number generators (PRNGs) play an important role in a variety of applications like computer simulations, and industrial applications including cryptography. High-quality PRNG can ...
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Chapter and Conference Paper
A Novel Arithmetic Unit over GF(2 m ) for Low Cost Cryptographic Applications
We present a novel VLSI architecture for division and multiplication in GF(2 m ), aimed at applications in low cost elliptic curve cryptographic processors. A compact and fast ar...
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Chapter and Conference Paper
A New Digit-Serial Systolic Mulitplier for High Performance GF(2 m ) Applications
This paper presents a new digit-serial systolic multiplier over GF(2 m ) for cryptographic applications. The proposed array is based on the most significant digit first (MSD-firs...
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Chapter
A New Arithmetic Unit in GF(2M) for Reconfigurable Hardware Implementation
In order to overcome the well-known drawback of reduced flexibility that is associated with traditional ASIC solutions, this paper proposes a new arithmetic unit (AU) in GF(2m) for reconfigurable hardware impleme...
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Chapter and Conference Paper
Compact Linear Systolic Arrays for Multiplication Using a Trinomial Basis in GF(2 m ) for High Speed Cryptographic Processors
Many of the cryptographic schemes over small characteristic finite fields are efficiently implemented by using a trinomial basis. In this paper, we present new linear systolic arrays for multiplication in GF(2 ...
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Chapter and Conference Paper
A New Arithmetic Unit in GF(2m) for Reconfigurable Hardware Implementation
This paper proposes a new arithmetic unit (AU) in GF(2m) for reconfigurable hardware implementation such as FPGAs, which overcomes the well-known drawback of reduced flexibility that is associated with traditiona...
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Chapter and Conference Paper
A Compact and Fast Division Architecture for a Finite Field GF(2m)
Division over a finite field GF(2m) is the most time and area consuming operation. In this paper, A new division architecture for GF(2m) using the standard basis representation is proposed. Based on a modified ve...