Abstract
Many of the cryptographic schemes over small characteristic finite fields are efficiently implemented by using a trinomial basis. In this paper, we present new linear systolic arrays for multiplication in GF(2m) for cryptographic applications using irreducible trinomials x m+x k+1. It is shown that our multipliers with trinomial basis require approximately 20 percent reduced hardware resources compared to previously proposed linear systolic multipliers using general irreducible polynomials. The proposed linear systolic arrays have the features of regularity and modularity, therefore, they are well suited to VLSI implementations.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Wang, C.L., Lin, J.L.: Systolic array implementation of multipliers for finite fields GF(2m). IEEE Trans. Circuits Syst. 38, 796–800 (1991)
Yeh, C.S., Reed, I.S., Troung, T.K.: Systolic multipliers for finite fields GF(2m). IEEE Trans. Computers C-33, 357–360 (1984)
Fenn, S.T.J., Benaissa, M., Taylor, D.: Dual basis systolic multipliers for GF(2m). IEE Proc. Comput. Digit. Tech. 144, 43–46 (1997)
Wozniak, J.J.: Systolic dual basis serial multiplier. IEE Proc. Comput. Digit. Tech. 145, 237–241 (1998)
Lee, C.Y., Lu, E.H., Lee, J.Y.: Bit parallel systolic multipliers for GF(2m) fields defined by all one and equally spaced polynomials. IEEE Trans. Computers 50, 385–393 (2001)
Zhou, B.B.: A new bit serial systolic multiplier over GF(2m). IEEE Trans. Computers C-37, 749–751 (1988)
Diab, M., Poli, A.: New bit serial systolic multiplier for GF(2m) using irreducible trinomials. Electronics Letters 27, 1183–1184 (1991)
Jain, S.K., Song, L., Parhi, K.K.: Efficient semisystolic architectures for finite field arithmetic. IEEE Trans. VLSI Syst. 6, 101–113 (1998)
Wu, H., Hasan, M.A., Blake, I.F.: New low complexity bit parallel finite field multipliers using weakly dual bases. IEEE Trans. Computers 47, 1223–1234 (1998)
Stinson, D.R.: On bit serial multiplication and dual bases in GF(2m). IEEE Trans. Inform. Theory 37, 1733–1736 (1991)
Sunar, B., Koc, C.K.: Mastrovito multipliers for all trinomials. IEEE Trans. Computers 48, 522–527 (1999)
Menezes, A.J.: Applications of Finite Fields. Kluwer Academic Publisher, Dordrecht (1993)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2005 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Kwon, S., Kim, C.H., Hong, C.P. (2005). Compact Linear Systolic Arrays for Multiplication Using a Trinomial Basis in GF(2m) for High Speed Cryptographic Processors. In: Gervasi, O., et al. Computational Science and Its Applications – ICCSA 2005. ICCSA 2005. Lecture Notes in Computer Science, vol 3480. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11424758_53
Download citation
DOI: https://doi.org/10.1007/11424758_53
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-25860-5
Online ISBN: 978-3-540-32043-2
eBook Packages: Computer ScienceComputer Science (R0)