Distributed Embedded Smart Cameras
Architectures, Design and Applications
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While sharing FPGA logic in space and time improves hardware utilization and reduces the overall power consumption in FPGA-accelerated clouds, it also raises security concerns. Accelerators from different tena...
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This paper presents a secure reconfigurable hierarchical hardware architecture at the pixel and region level for smart image sensors to accelerate machine vision applications. The design maintains hierarchical...
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Driving-related accidents and human casualties are on the rise in the US and around the globe (Brace et al. in Analysis of the literature: the use of mobile phones while driving, 2007). The US government spend...
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This chapter focusses on the development of a new image processing technique for the processing of large and complex images, especially SAR images. We propose here a new and effective approach that outperforms...
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Embedded smart cameras must provide enough computational power to handle complex image understanding algorithms on huge amount of data in-situ. In a distributed set-up, smart cameras must provide efficient com...
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In this chapter, we propose a design and verification environment for computational demanding and secure embedded vision-based systems. Starting with an executable specification in OpenCV, we provide subsequen...
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Dynamically partially reconfigurable architectures combine high performance and flexibility. They offer a novel possibility to dynamically load and execute hardware modules, previously only known for software ...
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Computer architects have been studying the dynamically reconfigurable computer (Schaumont, Verbauwhede, Keutzer, and Sarrafzadeh, “A Quick Safari through the Reconfiguration Jungle,” in Proc. of the 38th Design A...
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This paper presents the design and implementation of a feature tracker on an embedded reconfigurable hardware system. Contrary to other works, the focus here is on the efficient hardware/software partitioning ...