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    Chapter and Conference Paper

    Monitoring Implementation for Spiking Neural Networks Architecture on Zynq-7000 All Programmable SoCs

    This paper describes a Spiking Neural Networks (SNN) architecture mapped on a Zynq-7000 family of programmable system-on-chip (SoC) devices. The novel spike monitoring system based on AER Protocol, uses AXI4 S...

    Mireya Zapata, Bernardo Vallejo-Mancero in Intelligent Human Systems Integration 2021 (2021)

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    Chapter and Conference Paper

    Characterizing High-Speed Serial Transceivers for a Multi-processor Parallel Architecture

    Emulation of large scale neural networks is a growing research field that tries to understand how the brain works. Different approaches based on hardware and software have been developed for this purpose. How...

    Mireya Zapata, Bernardo Vallejo-Mancero in Human Systems Engineering and Design III (2021)

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    Chapter and Conference Paper

    Acceleration of Evolutionary Grammar Using an MISD Architecture Based on FPGA and Petalinuxs

    The evolutionary grammars are part of the optimization methods and searching for solutions based on the biological evolution postulates. The proposed technique is based on the genetic recombination’s concept ...

    Bernardo Vallejo-Mancero, Mireya Zapata in Advances in Artificial Intelligence, Softw… (2021)