Abstract
Emulation of large scale neural networks is a growing research field that tries to understand how the brain works. Different approaches based on hardware and software have been developed for this purpose. However, in this paper, we focus on dedicated parallel hardware implemented with FPGA. In this context, brain connectivity is one of the biggest challenges to overcome for neuromorphic circuits. To establish an efficient communication link in multi-FPGA architectures, high-speed serial transceivers GTX are an excellent alternative. Through hardware tests with Kintex 7 and Zynq ZC706 platforms, we compare eye pattern, and BER results, in order to obtain the optimal line rate to establish communication between both boards. The maximum transmission speed achieved without signal degradation was 5 Gpbs.
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Zapata, M., Vallejo-Mancero, B., Topon-Visarrea, L. (2021). Characterizing High-Speed Serial Transceivers for a Multi-processor Parallel Architecture. In: Karwowski, W., Ahram, T., Etinger, D., Tanković, N., Taiar, R. (eds) Human Systems Engineering and Design III. IHSED 2020. Advances in Intelligent Systems and Computing, vol 1269. Springer, Cham. https://doi.org/10.1007/978-3-030-58282-1_47
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