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Chapter and Conference Paper
A Compact and Fast Division Architecture for a Finite Field GF(2m)
Division over a finite field GF(2m) is the most time and area consuming operation. In this paper, A new division architecture for GF(2m) using the standard basis representation is proposed. Based on a modified ve...
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Chapter and Conference Paper
A New Systolic Array for Least Significant Digit First Multiplication in GF(2 m )
This paper presents a new digit-serial systolic multiplier over GF(2 m ) for cryptographic applications. When input data come in continuously, the proposed array produces multipl...
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Chapter and Conference Paper
A Linear Systolic Array for Multiplication in GF(2 m ) for High Speed Cryptographic Processors
We present new designs of low complexity and low latency systolic arrays for multiplication in GF(2 m ) when there is an irreducible all one polynomial (AOP) of degree m. Our pro...
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Chapter and Conference Paper
Compact Linear Systolic Arrays for Multiplication Using a Trinomial Basis in GF(2 m ) for High Speed Cryptographic Processors
Many of the cryptographic schemes over small characteristic finite fields are efficiently implemented by using a trinomial basis. In this paper, we present new linear systolic arrays for multiplication in GF(2 ...
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Chapter and Conference Paper
Construction of Group Rules for VLSI Application
An application of cellular automata (CA) has been proposed for building parallel processing systems, cryptographic hashing functions, and VLSI technology. Recently, Das et al. have reported characterization of...