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Wafer-scale fabrication of carbon-nanotube-based CMOS transistors and circuits with high thermal stability

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Abstract

Thanks to its single-atomic-layer structure, high carrier transport, and low power dissipation, carbon nanotube electronics is a leading candidate towards beyond-silicon technologies. Its low temperature fabrication processes enable three-dimensional (3D) integration with logic and memory (static random access memory (SRAM), magnetic random access memory (MRAM), resistive random access memory (RRAM), etc.) to realize efficient near-memory computing. Importantly, carbon nanotube transistors require good thermal stability up to 400 °C processing temperature to be compatible with back-end-of-line (BEOL) process, which has not been previously addressed. In this work, we developed a robust wafer-scale process to build complementary carbon nanotube transistors with high thermal stability and good uniformity, where AIN was employed as electrostatic do** layer. The gate stack and passivation layer were optimized to realize high-quality interfaces. Specifically, we demonstrate 1-bit carbon nanotube full adders working under 250 °C with rail-to-rail outputs.

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Acknowledgements

The authors gratefully acknowledge fundings from the National Natural Science Foundation of China (No. 61888102) and the Bei**g Municipal Science and Technology Commission (No. D171100006617002).

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Author notes

  1. Nan Wei, Ningfei Gao, and Haitao Xu contributed equally to this work.

Authors and Affiliations

  1. Bei**g HuaTan Yuan**n Electronics Technology Ltd. Co., Bei**g, 101399, China

    Nan Wei, Ningfei Gao, Haitao Xu & **aodong Du

  2. Research Center for Carbon-based Electronics, Peking University, Bei**g, 100871, China

    Nan Wei & Lian-Mao Peng

  3. Bei**g Institute of Carbon-based Integrated Circuits, Bei**g, 100195, China

    Haitao Xu, Zhen Liu, Lei Gao, Haoxin Jiang, Yu Tian & Yufeng Chen

Authors
  1. Nan Wei
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  2. Ningfei Gao
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  3. Haitao Xu
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  4. Zhen Liu
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  5. Lei Gao
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  7. Yu Tian
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  8. Yufeng Chen
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  9. **aodong Du
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  10. Lian-Mao Peng
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Corresponding authors

Correspondence to Haitao Xu or Lian-Mao Peng.

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Wei, N., Gao, N., Xu, H. et al. Wafer-scale fabrication of carbon-nanotube-based CMOS transistors and circuits with high thermal stability. Nano Res. 15, 9875–9880 (2022). https://doi.org/10.1007/s12274-022-4259-9

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  • DOI: https://doi.org/10.1007/s12274-022-4259-9

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