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High speed universal NAND gate based on weakly coupled RF MEMS resonators
Logical gates have been used in implementation of logic sequential and combinational circuits especially in computers, DSPs and microprocessors. They...
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Moving On from the NAND Gate
This chapter will discuss how engineers moved on from discovering the first NAND gate. It will introduce you to the SR latch and show how this led to... -
Design of Low-Power CMOS VCO with Three Transistors NAND Gate and MOS Varactor
A low-power VCO circuit design with varying NMOS load and 3-transistors NAND gate and is presented. VCO circuit is designed with 180 nm gate length....
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Hetero-dielectric macaroni channel cylindrical gate all around field effect transistor (HD-MC CGAA FET) for reduced gate leakage analog applications
In this paper a Hetero-Dielectric Macaroni Channel Cylindrical Gate All Around FET (HD-MC CGAA FET) is proposed for reduced gate leakage analog...
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Implementation of a Boolean function with a double-gate vertical TFET (DGVTFET) using numerical simulations
Tunnel field-effect transistors (TFETs) have been explored extensively as a possible substitute for MOSFETs, especially for digital system design...
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Efficient Design of FGMOS-Based Low-Power Low-Voltage XOR Gate
Full adders (FAs) are the core elements and substantially impact the performance of digital signal processing applications such as arithmetic logic...
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Flash Memory and NAND
This chapter is focused on the fundamentals of Flash memory and NAND in particular. The explosion of data with the rise of the Internet and mobile... -
Design and analysis of logic circuits based on 8 nm double gate MOSFET
This paper proposed an 8 nm N-type Double Gate MOSFET with improved characteristics. A comparative study has been done based on substrate and oxide...
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Design and Realization of Logic Gates Using Double Gate Tunnel FET
Tunnel FETs in digital applications may replace MOSFETs because TFET offers distinguishing properties that make them suitable for digital... -
Introduction to 3D NAND Flash Memories
Nowadays, NAND Flash memories are in everybody’s hands, as they are the storage media used inside smartphones and tablets. At the same time NAND... -
CMOS Majority Element Based on NAND Logic with Reduced Sensitivity to Single Ionizing Particles
AbstractThe results of modeling the elements of a triple majority gate based on the CMOS NAND logic elements are presented. Modeling is carried out...
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Design of Domino Logic-Based NOR Gate Circuit for Reduction of Charge Sharing
In this paper, NAND gate circuit is designed by the help of domino logic circuit to improve the performance of NAND gate circuit. Domino logic... -
E3C Techniques for Protecting NAND Flash Memories
Due to the rapid technology scaling and increasing program/erase cycles, the raw bit error rate (RBER) in NAND flash memory keeps increasing rapidly....
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Implementation and Applications of a Ternary Threshold Logic Gate
Reducing delay, power consumption, and chip area of a logic circuit are the main targets of a digital circuit designer. Most of the times, the...
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NAND Flash Memory Devices Security Enhancement Based on Physical Unclonable Functions
According to the report (McIntyre, Annual flash controller update, 2009), solid-state drives (SSD) will take around 85% of enterprise storage... -
Computational Storage for 3D NAND Flash Error Recovery Flow Prediction
The Computational Storage paradigm is attracting increasing interest in many applications because of the performance and the energy-efficiency... -
Field Programmable Gate Array in DNA Computing
Biomolecular programming encompasses the utilization of diverse chemical reactions to execute computational functions and encode data within proteins... -
Masking Noise Pulses When Collecting a Charge from the Tracks of Single Ionizing Particles in a Majority Element Based on CMOS NAND Logic
AbstractThe results of modeling the processes of masking noise arising from the collection of charge by transistors from the tracks of single...
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Ultra-Compact All-Optical NAND Logic Gates Based on 4 × 4 MMI Coupler Using Silicon Hybrid Plasmonic Waveguides
We present a new structure based on ultra-compact cascaded multimode interference (CS-MMI) structures using silicon hybrid plasmonic waveguides... -
Quantum Gate Introduction: NOT and CNOT Gates
We will introduce the first two quantum gates in this chapter. One is a one-qubit NOT gate and the other is a two-qubit CNOT gate. We will learn how...