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Design and FPGA Implementation of Matrix Multiplier Using DEMUX-RCA-Based Vedic Multiplier
Matrix multiplication is a common technique for increasing the computational speed of scientific and engineering tasks. The matrix multiplier is...
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A Reconfigurable Multiplier/Dot-Product Unit for Precision-Scalable Deep Learning Applications
Across different Deep Learning (DL) applications or within the same application but in different phases, bitwidth precision of activations and...
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A Novel Reconfigurable Analog VLSI Architecture of M-point DFT Using Complex Matrix Multiplier and Graph-Based Signal Routing Method
A current-mode reconfigurable architecture for M-point discrete Fourier transform with a complex vector-matrix multiplication method has been...
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Distributed Capacitances in HV Multiplier Circuits
HV multipliers are employed for generating high voltage DC output from high frequency AC source. Cockroft Walton Voltage Multiplier (CWVM) is one...
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Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders
In recent years, long short-term memory (LSTM) networks have been extensively used in various domains such as machine interpretation, language...
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Lagrange multiplier imposition of non-conforming essential boundary conditions in implicit material point method
The Material Point Method (MPM) is an established and powerful numerical method particularly useful for simulating large-scale, rapid soil...
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Dynamical analysis of an improved FitzHugh-Nagumo neuron model with multiplier-free implementation
The cubic-polynomial nonlinearity with N -shaped curve plays a crucial role in generating abundant electrical activities for the original...
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Designing of an 8 × 8 Multiplier with New Inexact 4:2 Compressors for Image Processing Applications
Inexact computing brings benefits to error-tolerant applications, including multimedia and signal processing. Although inexact computing reduces...
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A Lagrange multiplier-based coupling approach for the combined finite-discrete element method applicable to mechanical investigation of composite materials
The discrete element (DE) method is advantageous in modelling fracture behaviour because of its particle characteristics, but it is computationally...
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Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays
Multiplication is indispensable and is one of the core operations in many modern applications including signal processing and neural networks....
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Multiplier Design for the Modulo Set \(\left\{ {2^{n} - 1,2^{n} ,2^{n + 1} - 1} \right\}\) and Its Application in DCT for HEVC
The Residue Number System (RNS) is a non-weighted number system. Because of its inherent parallelism, it has been extensively studied and used in...
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Efficient Design of Rounding-Based Approximate Multiplier Using Modified Karatsuba Algorithm
Arithmetic operations play a substantial role in many applications, such as image processing. In image processing applications, a multiplier is a...
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VLSI implementation of high speed multiplier architecture using VHBCSE algorithm for DSP applications
In this paper, the synchronous pipelined architecture of the Vertical Horizontal Binary Common Subexpression Elimination (VHBCSE) based FIR filter...
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Efficient Quantum Circuit for Karatsuba Multiplier
The fundamental element of quantum computing is the quantum circuit. An efficient quantum circuit saves quantum hardware resources by reducing the...
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Error-Efficient Approximate Multiplier Design using Rounding Based Approach for Image Smoothing Application
We propose a novel, error-efficient approximate multiplier (EEAM), which is based on a rounding-based approach (RBA). Multiplication is performed...
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Low power multiplier based long short-term memory hardware architecture for smart grid energy management
RNN (Recurrent Neural Network) based data analytics method has evolved as a best-integrated method for Energy management in Smart Grid. Long...
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Energy-Efficient VLSI Squarer Unit with Optimized Radix-2m Multiplication Logic
Multipliers are demanded in a variety of applications. They consume higher power than other blocks. On the other hand, squarer units are less complex...
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Conserving integration of multibody systems with singular and non-constant mass matrix including quaternion-based rigid body dynamics
Mechanical systems with singular and/or configuration-dependent mass matrix can pose difficulties to Hamiltonian formulations, which are the standard...
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Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach
With the advancement in technology, various designs of multipliers offering low power consumption, high speed and less area have been proposed by...
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Memristor-Based Multiplier and Squarer of Some Numbers of the form 10 l ± m
The goal of this paper is to implement multiplier and squarer of some particular numbers of the form (10 l ± m), where l and m are positive integers...
