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Aggressive GPU cache bypassing with monolithic 3D-based NoC
Cache bypassing is widely employed to alleviate cache contention and pollution in GPUs. However, cache bypassing often puts more pressure on the...
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Multiobjective piecewise regressive elitism spotted hyena optimized map** for 3D NoC architecture design
Networks-on-chip (NoC) has network-based communication among operating cores and intellectual property (IP) cores combined on a similar chip....
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FT-PDC: an enhanced hybrid congestion-aware fault-tolerant routing technique based on path diversity for 3D NoC
In recent years, using three-dimensional Network-on-Chip (3D-NoC) has increased due to its high performance and integration of processing elements....
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Case Study: Real Hardware-Software Design of 3D-NoC-Based Neuromorphic System
This chapter presents the design and evaluation of a reliable three-dimensional digital neuromorphic processor (R-NASH) geared explicitly toward the...
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Machine learning-driven performance assessment of network-on-chip architectures
System-on-chip designs for high-performance computing systems widely use network-on-chip (NoC) technology. The critical metrics such as latency,...
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A Load Balancing Mechanism for 3D Network-on-Chip with Partially Vertically Connected Links
3D integrated circuit was presented as a new solution to enhance the efficiency and expand the capabilities of modern integrated circuit as well....
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Thermal-aware application map** using genetic and fuzzy logic techniques for minimizing temperature in three-dimensional network-on-chip
3D integration is one of the scalable multiprocessor design solutions. The main challenge in 3D design is temperature traps, especially in the upper...
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A Deadlock-Free and Adaptive Prime Perspective Turn Model for 3D-Mesh Based Network-on-Chips
With the tremendous demands for core-based digital systems, routing algorithms play a key role in improving metrics like performance parameters...
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Design of a Structured Hypercube Network Chip Topology Model for Energy Efficiency in Wireless Sensor Network Using Machine Learning
Network on chips (NoCs) 3D design expansion is continuously changing to produce energy-efficient NoCs. In this production, the major requirement is...
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LETHOR: a thermal-aware proactive routing algorithm for 3D NoCs with less entrance to hot regions
Although many Dynamic Thermal Management (DTM) techniques are employed to overcome thermal problems in 3D NoCs, none of them consider temperature...
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3D LBDR: Logic-Based Distributed Routing for 3D NoC
A Network-on-Chip (NoC) is a new design in a complex system on chip (SoC) designs that provide efficient on-chip communication between networks. The...
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ILP formulation and heuristic method for energy-aware application map** on 3D-NoCs
The rapid increase in the number of cores on chips forced the designers to invent new communication methods such as Network-on-Chip (NoC) paradigm....
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Energy-Efficient Spike-Based Scalable Architecture for Next-Generation Cognitive AI Computing Systems
In recent years, neuromorphic computing systems have taken a range of design approaches to exploit known computational principles of cognitive...
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Advancing Abdominal Organ and PDAC Segmentation Accuracy with Task-Specific Interactive Models
Deep learning-based segmentation algorithms have the potential to expedite the cumbersome clinical task of creating detailed target delineations for...
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Design of duel-core connected mesh topology and fine-grained fault-tolerant mechanism for 3D optical network-on-chip
This paper proposes a fault-tolerant mechanism including a reliable three-dimensional (3D) topology structure named 3D DCMesh (3D duel-core connected...
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Cores in multiway networks
The notion of a core is generalized to multiway networks. To determine the multiway cores, we adapted already-known algorithms for determining the...
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Multi-scale inputs and context-aware aggregation network for stereo matching
Despite the significant progress made in deep learning-based stereo matching, the accuracy of these methods significantly decreases when faced with...
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Mask Reconstruction Augmentation and Attention Aggregation for Stereo Matching
Stereo matching is a significant task in computer vision and is widely used for depth prediction. Although deep learning stereo matching networks...
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Routing in 3D NoCs Using Genetic Algorithm and Particle Swarm Optimization
Networks-on-chip are a new concept in System-on-chip interconnections, facilitating and optimizing complex components integration. However, as it is...