23 Result(s)
within
R S Gupta
Nanotechnology
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Article
RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications
For low-power circuit applications, the performance of the circuit is significantly influenced by the MOSFET's analog/RF and non-linearity properties. Gate-all-around junction-less accumulation mode MOSFETs (J...
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Article
Dielectric pocket engineered, gate induced drain leakages (GIDL) and analog performance analysis of dual metal nanowire ferroelectric MOSFET (DPE-DM-NW-Fe FET) as an inverter
This research article presents a simulation study on a dielectric pocket engineered dual metal nanowire ferroelectric (DPE-DM-NW-Fe FET) MOSFET. The aim is to mitigate the Gate-Induced Drain Leakage (GIDL) eff...
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Article
Correction: Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4 H-SiC)
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Article
Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications
The small signal model of MOSFET is a must for implementation of analog/digital circuits. The non-quasi-static (NQS) model is well known and provides accurate parameters for MOSFET. In the present work, extrin...
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Article
Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4H-SiC)
In this manuscript, analog/RF performance, linearity, harmonic distortion, small signal AC performance and scattering parameter (S-parameters) metrics of gate-stack DM nanowire (NW) FET (4H-silicon carbide) ha...
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Article
Physics based analytical modeling and simulation of Cylindrical Junctionless Nanowire Ferroelectric field effect transistor (CJNFe-FET) for enhanced analog performance
An analytical model has been examined in this work for dielectric engineered gate stack high K cylindrical junctionless nanowire ferrolectric field effect transistor (HCJNFe FET). HCJNFe FET (High K junctionle...
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Article
Microwave performance assessment of AlGaN/GaN/AlGaN DH-HEMT in terms of scattering parameters and various power gains
This paper presents a comprehensive investigation of microwave performance for symmetrically doped AlGaN/GaN/AlGaN DH-HEMT in terms of scattering parameters and power gains. A charge control based small signal...
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Article
Small signal model parameter extraction for cylindrical silicon-on-insulator Schottky barrier MOSFET
Small-signal model of the MOSFET is an equivalent circuit of its electric components, which defines the electrical characteristics of a MOSFET. The non-quasi-static (NQS) model is one of the most accurate smal...
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Article
Sheet carrier concentration and current–voltage analysis of Al0.15Ga0.85N/GaN/Al0.15Ga0.85N double heterostructure hemt incorporating the effect of traps
An analytical approach incorporating traps (donor type) in the AlGaN layer at the top and bottom heterointerface is proposed to determine threshold voltage (Vth), net sheet carrier concentration (ns) and drain cu...
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Article
Dual metal Schottky barrier asymmetric gate stack cylindrical gate all around (DM-SB-ASMGS-CGAA) MOSFET for improved analog performance for high frequency application
In this paper dual metal Schottky barrier asymmetric gate stack cylindrical gate all around (DM-SB-ASMGS-CGAA) MOSFET is analyzed for improvement in analog performance for applications with high frequency, usi...
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Article
Extraction of admittance parameters of symmetrically doped AlGaN/GaN/AlGaN DH-HEMT for microwave frequency applications
An analytical model for determining intrinsic short-circuit admittance (Y) parameters of AlGaN/GaN/AlGaN Double Heterostructure (DH) High Electron Mobility Transistor (HEMT) is presented. These Y parameters ob...
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Article
Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET
This paper proposes a physics-based 2-D analytical model for a dual- material gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET. Analytical modeling is pe...
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Article
High-K Spacer Dual-Metal Gate Stack Underlap Junctionless Gate All Around (HK-DMGS-JGAA) MOSFET for high frequency applications
High-K Spacer based Dual-Metal Gate Stack Junctionless Gate All Around (HK-DMGS-JGAA) MOSFET has been proposed and analyzed in this paper for high frequency analog ad RF applications. It has been done by compa...
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Article
Physics-based analytic modeling and simulation of gate-induced drain leakage and linearity assessment in dual-metal junctionless accumulation nano-tube FET (DM-JAM-TFET)
Physics-based analytical model is proposed in this paper which analyzes the effect of temperature, channel length and silicon film radius on gate-induced drain leakages (GIDL) in dual-metal junctionless accumu...
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Article
Assessment of analog RF performance for insulated shallow extension (ISE) cylindrical surrounding gate (CSG) MOSFET incorporating gate stack
In this paper, insulated shallow extension cylindrical surrounding gate (ISE-CSG) MOSFET with high-k gate stack has been proposed and extensively investigated. The performance of high-k ISE-CSG MOSFET has been...
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Article
Hafnium oxide based cylindrical junctionless double surrounding gate (CJLDSG) MOSFET for high speed, high frequency digital and analog applications
In this paper Hafnium Oxide (HfO2) based cylindrical Junctionless Double Surrounding Gate (CJLDSG) MOSFET has been analyzed for various metrics of device performance. HfO2 based CJLDSG MOSFET has been compared w...
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Article
Novel design to improve band to band tunneling and gate induced drain leakages (GIDL) in cylindrical gate all around (GAA) MOSFET
In this paper a cylindrical Dual Metal (DM) Dielectric Engineered (DE) Gate All Around (GAA) MOSFET has been proposed to resolve a big issue of Gate Inducted Drain leakage (GIDL) current in cylindrical Gate Al...
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Article
Interface trap-dependent linearity assessment in single and dual metal gate junctionless accumulation mode (surrounding gate) nanowire MOSFET
This paper examines the reliability issue of single metal gate (SMG) and dual metal gate (DMG) junctionless accumulation mode surrounding gate (JAM-SG) MOSFET. The impact of trap charges has also been consider...
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Article
Performance investigation of heterogeneous gate dielectric-gate metal engineered–gate all around-tunnel FET for RF applications
In this work, the effect of gate metal work function engineering (GME), gate bias and drain bias on the bias dependent parasitic capacitances has been studied. Further, RF Figure of merits (FOMs) such as power...
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Article
Mathematical modeling insight of hetero gate dielectric-dual material gate-GAA-tunnel FET for VLSI/analog applications
This paper presents a mathematical modeling insight for the novel heterogate dielectric-dual material gate-GAA TFET (HD-DMG-GAA-TFET) and validating the results with TCAD simulation. By using the appropriate b...
