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  1. No Access

    Chapter

    Design and Realization of CDR and SerDes Circuit Used in BLVDS Controlling System

    CDR(Clock and Data Recovery) and SerDes (Serializer/Deserializer) circuit is a critical circuit in the receiver of serial-data transceiver systems, and its performance affects the entire system’s function dire...

    Junyong Deng, Lin Jiang, Zecang Zeng in Recent Advances in Computer Science and In… (2012)

  2. No Access

    Chapter and Conference Paper

    The Design and Prototype Implementation of a Pipelined Heterogeneous Multi-core GPU

    Because of the widespread use of 3D graphics processing units, this paper presents the design and implementation of a heterogeneous multi-core graphics processing unit, the HMGPU-9. HMGPU-9 supports OpenGL2.0 ...

    Junyong Deng, Libo Chang, Guangxin Huang, Lingzhi **ao… in High Performance Computing (2013)

  3. No Access

    Article

    Demystifying graph processing frameworks and benchmarks

    Junyong Deng, Qinzhe Wu, **aoyan Wu, Shuang Song… in Science China Information Sciences (2020)