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  1. Article

    Open Access

    A Practical Approach for Employing Tensor Train Decomposition in Edge Devices

    Deep Neural Networks (DNN) have made significant advances in various fields including speech recognition and image processing. Typically, modern DNNs are both compute and memory intensive, therefore their depl...

    Milad Kokhazadeh, Georgios Keramidas in International Journal of Parallel Programm… (2024)

  2. No Access

    Chapter and Conference Paper

    On the OpenCL Support for Streaming Fixed-Function Accelerators on Embedded SoC FPGAs

    OpenCL is used in contemporary FPGA High-level Synthesis (HLS) design tools for the development of the host-side code which controls the data transfer between the processing system and the FPGA design. High pe...

    Panagiotis Mousouliotis, Topi Leppänen in Applied Reconfigurable Computing. Architec… (2023)

  3. No Access

    Book and Conference Proceedings

    Applied Reconfigurable Computing. Architectures, Tools, and Applications

    19th International Symposium, ARC 2023, Cottbus, Germany, September 27–29, 2023, Proceedings

    Francesca Palumbo, Georgios Keramidas in Lecture Notes in Computer Science (2023)

  4. No Access

    Article

    A Methodology for Efficient Tile Size Selection for Affine Loop Kernels

    Reducing the number of data accesses in memory hierarchy is of paramount importance on modern computer systems. One of the key optimizations addressing this problem is loop tiling, a well-known loop transforma...

    Vasilios Kelefouras, Karim Djemame in International Journal of Parallel Programm… (2022)

  5. No Access

    Chapter and Conference Paper

    A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices

    Deep Neural Networks (DNN) have made significant advances in various fields, including speech recognition and image processing. Typically, modern DNNs are both compute and memory intensive and as a consequence...

    Milad Kokhazadeh, Georgios Keramidas in Embedded Computer Systems: Architectures, … (2022)

  6. No Access

    Chapter and Conference Paper

    An Analytical Model for Loop Tiling Transformation

    Loop tiling is a well-known loop transformation that enhances data locality in memory hierarchy. In this paper, we initially reveal two important inefficiencies of current analytical loop tiling models and we ...

    Vasilios Kelefouras, Karim Djemame in Embedded Computer Systems: Architectures, … (2022)

  7. No Access

    Chapter and Conference Paper

    Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Experience

    Demographic and epidemiologic transitions have brought a new health care paradigm where life expectancy is increasing as well as the need for long-term care. To meet the resulting challenge, healthcare systems...

    Christos Antonopoulos, Georgios Keramidas in Applied Reconfigurable Computing. Architec… (2018)

  8. Chapter and Conference Paper

    Erratum to: Applied Reconfigurable Computing

    Nikolaos Voros, Michael Huebner in Applied Reconfigurable Computing. Architec… (2018)

  9. No Access

    Article

    Revisiting Cache Resizing

    We present a novel framework to dynamically reconfigure on-chip memory resources according to the changing behavior of the executing applications. Our framework enables smooth scaling (i.e., resizing) of the o...

    Georgios Keramidas, Chrysovalantis Datsios in International Journal of Parallel Programming (2015)