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  1. Article

    Open Access

    A Practical Approach for Employing Tensor Train Decomposition in Edge Devices

    Deep Neural Networks (DNN) have made significant advances in various fields including speech recognition and image processing. Typically, modern DNNs are both compute and memory intensive, therefore their depl...

    Milad Kokhazadeh, Georgios Keramidas in International Journal of Parallel Programm… (2024)

  2. No Access

    Chapter and Conference Paper

    On the OpenCL Support for Streaming Fixed-Function Accelerators on Embedded SoC FPGAs

    OpenCL is used in contemporary FPGA High-level Synthesis (HLS) design tools for the development of the host-side code which controls the data transfer between the processing system and the FPGA design. High pe...

    Panagiotis Mousouliotis, Topi Leppänen in Applied Reconfigurable Computing. Architec… (2023)

  3. No Access

    Book and Conference Proceedings

    Applied Reconfigurable Computing. Architectures, Tools, and Applications

    19th International Symposium, ARC 2023, Cottbus, Germany, September 27–29, 2023, Proceedings

    Francesca Palumbo, Georgios Keramidas in Lecture Notes in Computer Science (2023)

  4. No Access

    Chapter and Conference Paper

    A Comparative Study of Neural Network Compilers on ARMv8 Architecture

    The deployment of Deep Neural Network (DNN) models in far edge devices is a challenging task, because these devices are characterized by scarce resources. To address these challenges various deep learning tool...

    Theologos Anthimopulos, Georgios Keramidas in Architecture of Computing Systems (2023)

  5. No Access

    Article

    A Methodology for Efficient Tile Size Selection for Affine Loop Kernels

    Reducing the number of data accesses in memory hierarchy is of paramount importance on modern computer systems. One of the key optimizations addressing this problem is loop tiling, a well-known loop transforma...

    Vasilios Kelefouras, Karim Djemame in International Journal of Parallel Programm… (2022)

  6. No Access

    Chapter and Conference Paper

    A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices

    Deep Neural Networks (DNN) have made significant advances in various fields, including speech recognition and image processing. Typically, modern DNNs are both compute and memory intensive and as a consequence...

    Milad Kokhazadeh, Georgios Keramidas in Embedded Computer Systems: Architectures, … (2022)

  7. No Access

    Chapter and Conference Paper

    An Analytical Model for Loop Tiling Transformation

    Loop tiling is a well-known loop transformation that enhances data locality in memory hierarchy. In this paper, we initially reveal two important inefficiencies of current analytical loop tiling models and we ...

    Vasilios Kelefouras, Karim Djemame in Embedded Computer Systems: Architectures, … (2022)

  8. Article

    Guest Editorial Note: Special Issue on Applied Reconfigurable Computing

    Georgios Keramidas, Nikolaos Voros, Michael Huebner in Journal of Signal Processing Systems (2020)

  9. No Access

    Chapter

    Accelerating AAL Home Services Using Embedded Hardware Components

    The EU-funded project RADIO brings forward a new healthcare paradigm according to which a mobile robotic platform can act as an assistant to an person in his/her domestic environment. The main goal of the ro...

    Georgios Keramidas, Christos P. Antonopoulos in RADIO--Robots in Assisted Living (2019)

  10. No Access

    Chapter and Conference Paper

    Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Experience

    Demographic and epidemiologic transitions have brought a new health care paradigm where life expectancy is increasing as well as the need for long-term care. To meet the resulting challenge, healthcare systems...

    Christos Antonopoulos, Georgios Keramidas in Applied Reconfigurable Computing. Architec… (2018)

  11. Chapter and Conference Paper

    Erratum to: Applied Reconfigurable Computing

    Nikolaos Voros, Michael Huebner in Applied Reconfigurable Computing. Architec… (2018)

  12. No Access

    Book

  13. No Access

    Chapter

    VirISA: Recruiting Virtualization and Reconfigurable Processor ISA for Malicious Code Injection Protection

    As users place increasingly more sensitive information in IT products, trusting that a system is not compromised by malicious entities becomes imperative. Code injection is a well-known attack that can directl...

    Apostolos P. Fournaris, Georgios Keramidas in Components and Services for IoT Platforms (2017)

  14. No Access

    Chapter

    IoT in Ambient Assistant Living Environments: A View from Europe

    The purpose of this chapter is to offer a survey of the EU funded projects within the scope of Internet of Things and ambient assisted living (AAL) environments. Our analysis concentrates on three main aspects...

    Christos Panagiotou, Christos Antonopoulos in Components and Services for IoT Platforms (2017)

  15. No Access

    Article

    Revisiting Cache Resizing

    We present a novel framework to dynamically reconfigure on-chip memory resources according to the changing behavior of the executing applications. Our framework enables smooth scaling (i.e., resizing) of the o...

    Georgios Keramidas, Chrysovalantis Datsios in International Journal of Parallel Programming (2015)

  16. No Access

    Chapter and Conference Paper

    Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Perspective

    Demographic and epidemiologic transitions in Europe have brought a new health care paradigm where life expectancy is increasing as well as the need for long-term care. To meet the resulting challenge, European...

    Christos Antonopoulos, Georgios Keramidas in Applied Reconfigurable Computing (2015)

  17. No Access

    Chapter

    From Hardware Security Tokens to Trusted Computing and Trusted Systems

    As security attacks are becoming an everyday real-life scenario, security engineers must invent more intricate countermeasures to deal with them. Infusion of strong security to a computer system by recruiting ...

    Apostolos P. Fournaris, Georgios Keramidas in System-Level Design Methodologies for Tele… (2014)

  18. No Access

    Chapter

    Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches

    In this paper, we propose a novel approach to reduce dynamic power in set-associative caches that leverages on a leakage-saving proposal, namely Cache Decay. We thus open the possibility to unify dynamic and l...

    Georgios Keramidas, Polychronis Xekalakis in Transactions on High-Performance Embedded … (2009)

  19. No Access

    Chapter and Conference Paper

    Applying Decay to Reduce Dynamic Power in Set-Associative Caches

    In this paper, we propose a novel approach to reduce dynamic power in set-associative caches that leverages on a leakage-saving proposal, namely Cache Decay. We thus open the possibility to unify dynamic and l...

    Georgios Keramidas, Polychronis Xekalakis in High Performance Embedded Architectures an… (2007)

  20. No Access

    Chapter and Conference Paper

    Dynamic Dictionary-Based Data Compression for Level-1 Caches

    Data cache compression is actively studied as a venue to make bet ter use of on-chip transistors, increase apparent capacity of caches, and hide the long memory latencies. While several techniques have been pr...

    Georgios Keramidas, Konstantinos Aisopos in Architecture of Computing Systems - ARCS 2… (2006)

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