Applied Reconfigurable Computing. Architectures, Tools, and Applications
19th International Symposium, ARC 2023, Cottbus, Germany, September 27–29, 2023, Proceedings
Article
Deep Neural Networks (DNN) have made significant advances in various fields including speech recognition and image processing. Typically, modern DNNs are both compute and memory intensive, therefore their depl...
Chapter and Conference Paper
OpenCL is used in contemporary FPGA High-level Synthesis (HLS) design tools for the development of the host-side code which controls the data transfer between the processing system and the FPGA design. High pe...
Book and Conference Proceedings
19th International Symposium, ARC 2023, Cottbus, Germany, September 27–29, 2023, Proceedings
Chapter and Conference Paper
The deployment of Deep Neural Network (DNN) models in far edge devices is a challenging task, because these devices are characterized by scarce resources. To address these challenges various deep learning tool...
Article
Reducing the number of data accesses in memory hierarchy is of paramount importance on modern computer systems. One of the key optimizations addressing this problem is loop tiling, a well-known loop transforma...
Chapter and Conference Paper
Deep Neural Networks (DNN) have made significant advances in various fields, including speech recognition and image processing. Typically, modern DNNs are both compute and memory intensive and as a consequence...
Chapter and Conference Paper
Loop tiling is a well-known loop transformation that enhances data locality in memory hierarchy. In this paper, we initially reveal two important inefficiencies of current analytical loop tiling models and we ...
Chapter and Conference Paper
Demographic and epidemiologic transitions have brought a new health care paradigm where life expectancy is increasing as well as the need for long-term care. To meet the resulting challenge, healthcare systems...
Chapter and Conference Paper
Article
We present a novel framework to dynamically reconfigure on-chip memory resources according to the changing behavior of the executing applications. Our framework enables smooth scaling (i.e., resizing) of the o...
Chapter and Conference Paper
Demographic and epidemiologic transitions in Europe have brought a new health care paradigm where life expectancy is increasing as well as the need for long-term care. To meet the resulting challenge, European...
Chapter
In this paper, we propose a novel approach to reduce dynamic power in set-associative caches that leverages on a leakage-saving proposal, namely Cache Decay. We thus open the possibility to unify dynamic and l...
Chapter and Conference Paper
In this paper, we propose a novel approach to reduce dynamic power in set-associative caches that leverages on a leakage-saving proposal, namely Cache Decay. We thus open the possibility to unify dynamic and l...
Chapter and Conference Paper
Data cache compression is actively studied as a venue to make bet ter use of on-chip transistors, increase apparent capacity of caches, and hide the long memory latencies. While several techniques have been pr...
Chapter and Conference Paper
Denial-of-Service (DoS) attacks try to exhaust some shared resources (e.g. process tables, functional units) of a service-centric provider. As Chip Multi-Processors (CMPs) are becoming mainstream architecture ...