Page
%P
-
Chapter and Conference Paper
An SMT Encoding of LLVM’s Memory Model for Bounded Translation Validation
Several automatic verification tools have been recently developed to verify subsets of LLVM’s optimizations. However, none of these tools has robust support to verify memory optimizations.
-
Chapter and Conference Paper
Second-Order Equational Logic (Extended Abstract)
We extend universal algebra and its equational logic from first to second order as follows.