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    Chapter and Conference Paper

    A Novel Hybrid Last Level Cache Based on Multi-retention STT-RAM Cells

    Spin-transfer torque random access memory (STT-RAM) is one of the most promising substitutes for universal main memory and cache due to its excellent scalability, high storage density and low leakage power. A...

    Hongguang Zhang, Minxuan Zhang, Zhenyu Zhao, Shuo Tian in Advanced Computer Architecture (2016)

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    Chapter and Conference Paper

    Coarse Granularity Data Migration Based Power Management Mechanism for 3D DRAM Cache

    3D-stacked technology is a promising solution to improve the performance of on-chip memory system. In our work, a 3D DRAM Cache with high density and wide bandwidth is utilized as the Last Level Cache (LLC). ...

    Litiao Qiu, Lei Wang, Hongguang Zhang, Zhenyu Zhao in Advanced Computer Architecture (2016)