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Design and analysis of the dynamic frequency divider using the BiCMOS–NDR chaos-based circuit

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Abstract

A dynamic frequency divider using a negative-differential-resistance (NDR) circuit combined with an inductor and a capacitor was demonstrated. This NDR circuit was made of Si-based metal-oxide-semiconductor field-effect transistor (MOS) and SiGe-based heterojunction bipolar transistor devices. The operation of this frequency divider circuit was based on the long-period behavior of the nonlinear NDR circuit generating chaos phenomena. This circuit was analyzed by numerical simulation and the results showed that different dividing ratio could be obtained by modulating the input signal frequency using the MATLAB program and the HSPICE program. Some measured results were shown to verify our analyses. This application was designed based on a standard 0.18 μm BiCMOS technique.

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Acknowledgements

The authors would like to thank the Chip Implementation Center (CIC) of Taiwan for its great effort and assistance in arranging the fabrication of this chip. This work was financially supported by the Ministry of Science and Technology of Taiwan under contract no. NSC101-2221-E-415-026.

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Authors and Affiliations

  1. Department of Electrical Engineering, National Chiayi University, No. 300, Syuefu Rd., Chiayi City, 60004, Taiwan, ROC

    Kwang-Jow Gan, Chun-Yi Guo & **-Feng Wu

  2. Department of Electronic Engineering, Kun Shan University, No. 195, Kunda Rd., YongKang Dist., Tainan City, 71003, Taiwan, ROC

    Yaw-Hwang Chen

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  1. Kwang-Jow Gan
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  2. Chun-Yi Guo
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Correspondence to Kwang-Jow Gan.

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Gan, KJ., Guo, CY., Wu, PF. et al. Design and analysis of the dynamic frequency divider using the BiCMOS–NDR chaos-based circuit. Analog Integr Circ Sig Process 96, 9–19 (2018). https://doi.org/10.1007/s10470-018-1200-y

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  • DOI: https://doi.org/10.1007/s10470-018-1200-y

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