Highly Reliable PMOS Pass Transistor-Based Radiation Tolerant 12T SRAM Cell for Deep Space Applications

  • Conference paper
  • First Online:
Microelectronics, Circuits and Systems

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 976))

  • 311 Accesses

Abstract

This paper proposes a highly reliable PMOS pass transistor-based radiation-tolerant 12T (PPTRT 12T) SRAM cell for deep-space applications. The proposed SRAM cell achieves 17.88% improvement in critical charge (QC), 2.19× improvement in read static noise margin (RSNM), and 1.24× improvement in read access time (TRA) as compared to QUCCE 10T SRAM cell at the expense of marginal (1.04×) degradation in write access time (TWA). The read operation of the proposed circuit is highly stable (read upset proof) because of its higher RSNM. It is also highly reliable in radiation environments because of its higher QC. The theoretical design of the proposed SRAM cell has been validated with extensive simulations on PrimeSim HSPICE using 16-nm high-performance CMOS technology.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Subscribe and save

Springer+ Basic
EUR 32.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or Ebook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
EUR 29.95
Price includes VAT (France)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
EUR 192.59
Price includes VAT (France)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Hardcover Book
EUR 242.64
Price includes VAT (France)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free ship** worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. B. Narasimham, S. Gupta, D. Reed, J.K. Wang, N. Hendrickson, H. Taufique, Scaling trends and bias dependence of the soft error rate of 16 nm and 7 nm FinFET SRAMs, in Proceedings of IRPS (2018), pp. 4C.1–1–4C.1–4

    Google Scholar 

  2. M.T. Bohr, I.A. Young, CMOS scaling trends and beyond. IEEE Micro 37(6), 20–29 (2017)

    Google Scholar 

  3. R.C. Baumann, Radiation-induced soft errors in advanced semiconductor technologies. IEEE Trans. Device Mater. Reliab. 5(3), 305–316 (2005)

    Google Scholar 

  4. V. L. Ferlet-Cavrois, W.P. Gouker, Single event transients in digital CMOS—A review. IEEE Trans. Nucl. Sci. 60(3), 1767–1790 (2013)

    Google Scholar 

  5. P.E. Dodd, L.W. Massengill, Basic mechanisms and modeling of single-event upset in digital microelectronics. IEEE Trans. Device Mater. Reliab. 50(3), 583–602 (2003)

    Google Scholar 

  6. D. Krueger, E. Francom, J. Langsdorf, Circuit design for voltage scaling and SER immunity on a quad-core Itanium processor, in Proceedings of International Solid-State Circuits Conference (2008), pp. 94–95

    Google Scholar 

  7. T. Karnik, P. Hazucha, J. Patel, Characterization of soft errors caused by single event upsets in CMOS processes. IEEE Trans. Dependable Secure Comput. 1(2), 128–143 (2004)

    Google Scholar 

  8. S.M. Jahinuzzaman, D.J. Sachdev, M. Sachdev, A soft error tolerant 10T SRAM bit-cell with differential read capability. IEEE Trans. Nucl. Sci. 56(6), 3768–3773 (2009)

    Google Scholar 

  9. I.S. Jung, Y.B. Kim, F. Lombardi, A novel sort error hardened 10T SRAM cells for low voltage operation, in Proceedings of IEEE 55th International MWSCAS (2012), pp. 714–717

    Google Scholar 

  10. J. Jiang, Y. Xu, W. Zhu, J. **ao, S. Zou, Quadruple cross-coupled latch-based 10T and 12T SRAM bit-cell designs for highly reliable terrestrial applications. IEEE Trans. Circuits Syst. I Regul. Pap. 66(3), 967–977 (2019)

    Google Scholar 

  11. J. Guo et al., Design of area-efficient and highly reliable RHBD 10T memory cell for aerospace applications. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 26(5), 991–994 (2018)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Aminul Islam .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2023 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Yekula, R.T., Pandey, M., Islam, A. (2023). Highly Reliable PMOS Pass Transistor-Based Radiation Tolerant 12T SRAM Cell for Deep Space Applications. In: Biswas, A., Islam, A., Chaujar, R., Jaksic, O. (eds) Microelectronics, Circuits and Systems. Lecture Notes in Electrical Engineering, vol 976. Springer, Singapore. https://doi.org/10.1007/978-981-99-0412-9_1

Download citation

  • DOI: https://doi.org/10.1007/978-981-99-0412-9_1

  • Published:

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-99-0411-2

  • Online ISBN: 978-981-99-0412-9

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Navigation