Formal Verification for VRM Requirement Models

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Communications, Signal Processing, and Systems (CSPS 2021)

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 878))

Abstract

At the requirements level, formal verification and analysis are the focus of task’s attention which is develo** complex systems by formal methods. Model checking is a technique for analysis and automated verification of complex safety-critical software systems. In this paper, a requirement model verification method based on formal technology is proposed to practice the model checking activity into the development process. Firstly, this essay analyzes syntax and semantics of models, which are defined by tabular expressions in VRM (variables relationship model). Then we preprocess the VRM model to classify into events tables, conditions tables and model class tables, and transform the VRM model into the automaton state transfer diagram with the help of semantic complementary work. Finally, we design an automatic model transformation framework from the VRM model to the model verification tool (nuXmv) and implement a translator between the formal specification language VRM and the symbolic model checker nuXmv. In this paper, we discuss our translation and abstraction approach in some depth and illustrate its feasibility with some preliminary examples.

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Correspondence to Yang Zhang .

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Zhang, Y., Hu, J., Wang, L., Gu, Q., Rong, H. (2022). Formal Verification for VRM Requirement Models. In: Liang, Q., Wang, W., Liu, X., Na, Z., Zhang, B. (eds) Communications, Signal Processing, and Systems. CSPS 2021. Lecture Notes in Electrical Engineering, vol 878. Springer, Singapore. https://doi.org/10.1007/978-981-19-0390-8_121

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  • DOI: https://doi.org/10.1007/978-981-19-0390-8_121

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-19-0389-2

  • Online ISBN: 978-981-19-0390-8

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