Abstract
The designs at nanoscale exhibit much higher defect rates than in conventional lithography-based VLSI designs. It demands new defect-tolerant schemes to achieve high yield at this scale. One of the most promising nanoscale computational architectures is the crossbar-based architecture. In order to realize various logic circuits using nanoscale crossbar arrays; different logic functions need to be mapped within these nanoscale crossbars containing defective crosspoints. In this work, we use a novel technique to find a proper assignment of different logic functions in the nanoscale crossbar arrays having defective crosspoints. Our proposed method is based on the generation and use of unique number sequence during function map**. The unique sequence accelerates the matching of the functions and nanowires in an efficient way. Experimental results show that our algorithm provides satisfactory results in terms of success percentage of function map**.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Bourianoff, G.: The future of nanocomputing. IEEE Comput. 38(8), 44–53 (2003)
Goldstein, S.C., Budiu, M.: Nanofabrics: spatial computing using molecular nanoelectronics. In: 28th International Symposium Computer Architecture, pp. 178–189 (2001)
Goldstein, S.C., Rosewater, D.: Digital logic using molecular electronics. In: International Solid-State Circuits Conference, p. 125 (2002)
Mishra, M., Goldstein, S.: Scalable defect tolerance for molecular electronics. Non-Silicon Computation (NSC-1), p. 78 (2002)
Kule, M., Rahaman, H., Bhattacharya, B.B.: On finding a defect-free component in nanoscale crossbar circuits. In: 4th ICECCS 2015, Procedia Computer Science, vol. 70, pp. 421–427 (2015)
Yang, J.-S., Datta, R.: Efficient function map** in nanoscale crossbar architecture. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 190–196, October 2011
Tahoori, M.B.: Low-overhead defect tolerance in crossbar nanoarchitectures. ACM JETC, July 2009
Naeimi, H., DeHon, A.: A greedy algorithm for tolerating defective crosspoints in NanoPLA design. In: IEEE International Conference on Field-Programmable Technology (FPT 2004), 6–8 December 2004
Hogg, T., Snider, G.: Defect-tolerant logic with nanoscale crossbar circuits. In: HP Labs, Palo Alto, CA, 25 May 2004
Butts, M., DeHon, A., Glodstein, S.C.: Molecular electronics: devices, systems and tools for Gigagate, Gigabit chips. In: ICCAD 2002, pp. 440–443
DeHon, A., Wilson, M.J.: Nanowire-based sublithographic programmable logic arrays. In: FPGA, pp. 123–132, February 2004
Ziegler, M., Stan, M.: Design and analysis of crossbar circuits for molecular nano-electronics. In: IEEE Conference on Nanotechnology (IEEENANO), pp. 323–327 (2002)
Su, Y., Rao, W.: Defect-tolerant logic map** on nanoscale crossbar architectures and yield analysis. In: 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT’09, pp. 322–330, 7–9 October 2009
Author information
Authors and Affiliations
Corresponding authors
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2021 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Chaku, T., Kundu, M., Dhara, D., Kule, M. (2021). A New Function Map** Approach in Defective Nanocrossbar Array Using Unique Number Sequence. In: Bhattacharjee, D., Kole, D.K., Dey, N., Basu, S., Plewczynski, D. (eds) Proceedings of International Conference on Frontiers in Computing and Systems. Advances in Intelligent Systems and Computing, vol 1255. Springer, Singapore. https://doi.org/10.1007/978-981-15-7834-2_75
Download citation
DOI: https://doi.org/10.1007/978-981-15-7834-2_75
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-15-7833-5
Online ISBN: 978-981-15-7834-2
eBook Packages: Intelligent Technologies and RoboticsIntelligent Technologies and Robotics (R0)