3D Bidirectional-Channel Routing Algorithm for Network-Based Many-Core Embedded Systems

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Advanced Technologies, Embedded and Multimedia for Human-centric Computing

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 260))

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Abstract

Network-on-Chip (NoC) is an emerging technology designed for the communication of IPs in an embedded system. This paper proposes a 3D (Three-Dimensional) model for a Bi-directional NoC (BiNoC). This three-dimensional model inspires the development of a new routing algorithm for BiNoC, called Bidirectional Routing (Bi-Routing). Bi-Routing is a fully adaptive routing algorithm using different layers in the proposed three-dimensional model to avoid deadlock without prohibiting the use of any path. As such, Bi-Routing can improve the load balance and reduce the packet latency of an NoC. Experimental simulation results demonstrated superior performance compared with existing routing methods.

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Acknowledgments

This work was partially supported by National Science Council, ROC, under grant NSC-101-2220-E-002-008.

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Correspondence to Wen-Chung Tsai .

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Tsai, WC., Weng, YY., Wei, CJ., Chen, SJ., Hu, YH. (2014). 3D Bidirectional-Channel Routing Algorithm for Network-Based Many-Core Embedded Systems. In: Huang, YM., Chao, HC., Deng, DJ., Park, J. (eds) Advanced Technologies, Embedded and Multimedia for Human-centric Computing. Lecture Notes in Electrical Engineering, vol 260. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-7262-5_35

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  • DOI: https://doi.org/10.1007/978-94-007-7262-5_35

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  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-94-007-7261-8

  • Online ISBN: 978-94-007-7262-5

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