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Design of High-performance Heterogeneous Integrated Circuits

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Machine Learning-based Design and Optimization of High-Speed Circuits

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Abstract

This chapter is devoted to the development of design means for high-performance heterogeneous ICs, which will eliminate the shortcomings in the operation of circuits and provide increased performance and make these circuits universal.

The principles of develo** design means for high-performance heterogeneous integrated circuits were proposed, which significantly improve their main technical parameters, performance, and data transmission mechanisms between components and reduce design time.

A method improved the means of data transmission between components in high-performance heterogeneous integrated circuits, which, due to modified architecture, provides reduction in the number of data bits eight times, by increasing the used area in the core by 2.25%.

A method has been developed to improve the means of data transmission between clock domains in high-performance heterogeneous integrated circuits, which, due to mixed-signal architecture, provides delay decrease at least 50% due to an increase in the occupied area by an average of 21%.

A method was proposed for implementing the architecture of heterogeneous integrated circuits, which, due to a scheduler, memory management unit, direct memory access, and a special command set, provides a 32.48% increase in speed due to an increase of area by 11%.

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Melikyan, V. (2024). Design of High-performance Heterogeneous Integrated Circuits. In: Machine Learning-based Design and Optimization of High-Speed Circuits. Springer, Cham. https://doi.org/10.1007/978-3-031-50714-4_5

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