Abstract
This chapter introduces the GRAND Markov Order (GRAND-MO), a hard-input variant of GRAND designed specifically for communication channels with memory that are prone to burst noise. In a traditional communication system, burst noise is generally mitigated by employing interleavers and de-interleavers at the expense of higher latency. GRAND-MO can be applied directly to hard demodulated channel signals, eliminating the need for additional interleavers and de-interleavers and resulting in a substantial reduction in overall latency in a communication system. This chapter proposes a high-throughput GRAND-MO VLSI design that can achieve an average throughput of up to 52 Gbps for code length n = 128. Furthermore, the proposed GRAND-MO decoder implementation with a codelength n = 79 has a 33% lower worst-case latency and a 2 dB gain in decoding performance, at a target FER of 10−5, as compared to the (79, 64) BCH code decoder.
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Notes
- 1.
\(1+2\ldots {n}=\frac {n\times (n+1)}{2}\).
- 2.
Can be simplified to \(L\times (\frac {2\times {n}-L-3}{2})\).
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Abbas, S.M., Jalaleddine, M., Gross, W.J. (2023). Hardware Architecture for GRAND Markov Order (GRAND-MO). In: Guessing Random Additive Noise Decoding. Springer, Cham. https://doi.org/10.1007/978-3-031-31663-0_5
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DOI: https://doi.org/10.1007/978-3-031-31663-0_5
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