Abstract
In this chapter the bipolar, CMOS, and BiCMOS process technologies are described. Photodetectors which are produced in these technologies without process modifications and their properties are introduced. Furthermore, the possible improvements of photodetectors resulting from small substrate and process modifications are discussed. CMOS is the economically most important technology. The section on integrated photodetectors in CMOS technology, therefore, is more comprehensive than the sections on photodetectors in bipolar and BiCMOS technologies. Within the CMOS section, the sophisticated spatially-modulated-light (SML) detector suppressing slow carrier diffusion effects in standard CMOS will be described. Furthermore, the photonic mixer device (PMD) being relevant for future 3D cameras on a chip will be discussed. In addition, the innovative integration of vertical PIN photodiodes will be highlighted, since they allow a considerable improvement of the speed of CMOS OEICs. Avalanche photodiodes and single-photon avalanche diodes are explained. Triple-well processes are explained with respect of their isolation capabilities. Furthermore, image sensors using charge-coupled-devices and active pixel image sensors will be described in some detail because of their economical importance. Within the BiCMOS section, the exploitation of double photodiodes will be mentioned as another innovation for high-speed OEICs and OPTO-ASICs in standard technology. With some process modifications, a very fast vertical PIN photodiode was realized in BiCMOS technology.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Landolt-Börnstein, Numerical Data and Functional Relationships in Science and Technology, vol. 17c (Springer, Berlin, 1984), p. 474
M. Takagi, K. Nakayama, C. Terada, H. Kamoka, in Proceedings of the 4th Conference on Solid-State Devices, vol. 42(Suppl.) (Japan Society of Applied Physics, 1973), p. 101
D.D. Tang, T.H. Ning, R.D. Isaac, G.C. Feth, S.K. Wiedmann, H.-N. Yu, Subnanosecond self-aligned \(I^2L\)/MTL circuits. IEEE J. Solid-Sate Circuits 15(4), 444–449 (1980)
E.F. Labuda, J.T. Clemens, Integrated circuit technology, in Encyclopedia of Chemical Technology, ed. by R.E. Kirk, D.F. Othmer (Wiley, New York, 1980)
J.A. Appels, E. Kooi, M.M. Paffen, J.J.H. Schlorje, W.H.C.G. Verkuylen, Local oxidation of silicon and its application in semiconductor technology. Philips Res. Rep. 25, 118 (1970)
M. Grossman, Recessed-oxide isolation hikes IBM’s LSI density and speed. Electron Des. 12(6), 26–28 (1979)
R.J. Blumberg, S. Brenner, A 1500 gate, random logic, large-scale integrated (LSI) masterslice. IEEE J. Solid-State Circuits 14(5), 818–822 (1979)
D.D. Tang, P.M. Soloman, T.H. Ning, R.D. Issac, R.E. Burger, 1.25-\(\upmu \)m deep-groove-isolated self-aligned bipolar circuits. IEEE J. Solid-Sate Circuits 17(5), 925–931 (1982)
A. Hayasaka, Y. Takami, M. Kawamura, K. Ogiue, S. Ohwaki, U-groove isolation technique for high speed bipolar VLSI’s, in IEDM Digest Technical Papers (1982), pp. 62–65
H. Goto, T. Takada, R. Abe, Y. Kawabe, K. Oami, M. Tanaka, An isolation technology for high performance bipolar memories: IOP-II, in IEDM Digest Technical Papers (1982), pp. 58–61
M. Yamamoto, M. Kubo, K. Nakao, Si-OEIC with a built-in PIN-photodiode. IEEE Trans. Electron Devices 42(1), 58–63 (1995)
H.-M. Rein, R. Ranfft, Integrierte Bipolarschaltungen (Springer, Berlin, 1987), p. 50
H.H. Kim, R.G. Swartz, Y. Ota, T.K. Woodward, M.D. Feuer, W.L. Wilson, Prospects for silicon monolithic opto-electronics with polymer light emitting diodes. IEEE J. Light. Technol. 12(12), 2114–2121 (1994)
J. Popp, H.v. Philipsborn, 10 Gbit/s on-chip photodetection with self-aligned silicon bipolar transistors, in ESSDERC (1990), pp. 571–574
J. Wieland, H. Duran, A. Felder, Two-channel 5 Gbit/s silicon bipolar monolithic receiver for parallel optical interconnects. Electron. Lett. 30(4), 358 (1994)
H. Kabza, K. Ehinger, T.F. Meister, H.-W. Meul, P. Weger, I. Kerner, M. Miura-Mattausch, R. Schreiter, D. Hartwig, M. Reisch, M. Ohnemus, R. Köpl, J. Weng, H. Klose, H. Schaber, L. Treitinger, A 1-\(\upmu \)m polysilicon self-aligned bipolar process for low-power high-speed integrated circuits. IEEE Electron Device Lett. 10(8), 344–346 (1989)
J. Wieland, H. Melchior, M.Q. Kearley, C.R. Morris, A.M. Moseley, M.J. Goodwin, R.C. Goodfellow, Optical receiver array in silicon bipolar technology with selfaligned, low parasitic III/V detectors for DC-1 Gbit/s parallel links. Electron. Lett. 24(27), 2211–2213 (1994)
G. Winstel, C. Weyrich, Optoelektronik II (Springer, Berlin, 1986), p. 97
J. Lindemayer, C.Y. Wrigley, Beta cuttoff frequencies of junction transistors. Proc. IRE 50, 194–198 (1962)
D. Bolliger, P. Malcovati, A. Häberli, H. Baltes, P. Sarro, F. Maloberti, Integrated ultraviolet sensor system with on-chip 1 G\(\Omega \) transimpedance amplifier, in ISSCC (1996), pp. 328–329
D. Bolliger, R.S. Popovic, H. Baltes, Integration of a smart selective UV detector, in Transducers’95 and Eurosensors IX, Digest of Technical Papers 2 (8th International Conference on Solid-State Sensors and Actuators) (1995), pp. 144–147
L.K. Nanver, E.J.G. Goudena, H.W. van Zeijl, DIMES-01, a baseline BIFET process for smart sensor experimentation. Sens. Actuators A 36, 139–147 (1993)
H. Zimmermann, Improved CMOS-integrated photodiodes and their application in OEICs, in IEEE International Workshop on High Performance Electron Devices for Microwave & Optoelectronic Applications (1997), pp. 346–351
C.T. Kirk, A theory of transistor cutoff frequency \((f_{\rm T})\) falloff at high current densities. IRE Trans. Electron Devices ED–9, 164–174 (1962)
L.A. Hahn, The saturation characteristics of high-voltage transistors. Proc. IEEE 55(8), 1384–1388 (1967)
J.R.A. Beale, J.A.G. Slatter, The equivalent circuit of a transistor with a lightly doped collector operating in saturation. Solid-State Electron. 11, 241–252 (1968)
J.A. Pals, H.C. de Graaff, On the behaviour of the base-collector junction of a transistor at high collector current densities. Philips Res. Rep. 24, 53–69 (1969)
R.J. Whittier, D.A. Tremere, Current gain and cutoff frequency falloff at high currents. IEEE Trans. Electron Devices ED–16(1), 39–57 (1969)
H.C. Poon, H.K. Gummel, Modeling of emitter capacitance. Proc. IRE 57, 2181–2182 (1969)
H.C. de Graaff, Collector models for bipolar transistors. Solid-State Electron. 16, 587–600 (1973)
G. Rey, J.P. Bailbe, Some aspects of current gain variations in bipolar transistors. Solid-State Electron. 17, 1045–1057 (1974)
T.H. Ning, D.D. Tang, P.M. Solomon, Scaling properties of bipolar devices, IEEE International Electron Device Meeting (Washington, D.C., 1980), pp. 61–64
R. Swoboda, H. Zimmermann, A 2.5-Gb/s receiver OEIC in 0.6-\(\upmu \)m BiCMOS technology. IEEE Photonics Technol. Lett. 16(7), 1730–1732 (2004)
G. Schumicki, P. Seegebrecht, Prozesstechnologie (Springer, Berlin, 1991), pp. 370–380
T. Hori, Gate Dielectrics and MOS ULSIs (Springer, New York, 1997)
L.C. Parrillo, R.S. Payne, R.E. Davies, G.W. Rentlinger, R.L. Field, Twin-tub CMOS - a technology for VLSI circuits, in IEDM Digest Technical Papers (1980), pp. 752–755
C.-Y. Lu, J.J. Sung, H.C. Kirsch, N.-S. Tsai, R. Liu, A.S. Manocha, S.J. Hillenius, High-perfomance salicide shallow-junction CMOS devices for submicrometer VLSI application in twin-tub VI. IEEE Trans. Electron Devices 36(11), 2530–2536 (1989)
R.A. Chapman, C.C. Wei, D.A. Bell, S. Aur, G.A. Brown, R.A. Haken, 0.5 micron CMOS for high performance at 3.3 V, in IEDM Digest Technical Papers (1988), pp. 52–55
B. Davari, W.H. Chang, M. Wordeman, C.S. Oh, Y. Taur, K.E. Petrillo, D. Moy, J.J. Bucchignano, H.Y. Ng, M.G. Rosenfield, F.J. Hohn, M. D. Rodriguez, A high performance 0.25 \(\upmu \)m CMOS technology, in IEDM Digest Technical Papers (1988), pp. 56–59
Y. Ogasahara, M. Hashimoto, T. Kanamoto, T. Onoye, Supply noise suppression by triple-well structure. IEEE Trans. VLSI Syst. 21(4), 781–785 (2013)
W. Muth, Matrix method for latch-up free demonstration in a triple-well bulk-silicon technology. IEEE Trans. Nucl. Sci. 39(3), 396–400 (1992)
E. Braß, U. Hilleringmann, K. Schumacher, System integration of optical devices and analog CMOS amplifiers. IEEE J. Solid-State Circuits 29(8), 1006–1010 (1994)
U. Hilleringmann, K. Goser, Optoelectronic system integration on silicon: waveguides, photodetectors, and VLSI CMOS circuits on one chip. IEEE Trans. Electron Devices 42(5), 841–846 (1995)
E. Fullin, G. Voirin, M. Chevroulet, A. Lagos, J.-M. Moret, CMOS-based technology for integrated optoelectronics: a modular approach, in IEDM Digest Technical Papers (1994), pp. 527–530
R. Kauert, W. Budde, A. Kalz, A monolithic field segment photo sensor system. IEEE J. Solid-State Circuits 30(7), 807–811 (1995)
P. Lee, A. Simoni, A. Sartori, G. Torelli, A photosensor array for spectrophotometry. Sens. Actuators A 46–47, 449–452 (1995)
H. Zimmermann, K. Kieschnick, T. Heide, A. Ghazi, Integrated high-speed, high-responsivity photodiodes in CMOS and BiCMOS technology, in Proceedings of the 29th European Solid-State Device Conference (ESSDERC) (1999), pp. 332–335
M.L. Simpson, M.N. Ericson, G.E. Jellison, W.B. Dress, A.L. Wintenberg, M.B. Bobrek, Application specific spectral response with CMOS compatible photodiodes. IEEE Trans. Electron Devices 46(5), 905–913 (1999)
T.K. Woodward, A.V. Krishnamoorthy, 1 Gbit/s CMOS photoreceiver with integrated detector operating at 850 nm. Electron. Lett. 34(12), 1252–1253 (1998)
C. Rooman, D. Coppee, M. Kuijk, Asynchronous 250-Mb/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications. IEEE J. Solid-State Circuits 35(7), 953–957 (2000)
M. Kuijk, D. Coppee, R. Vounckx, Spatially modulated light detector in CMOS with sense-amplifier receiver operating at 180 Mb/s for optical data link applications and parallel optical interconnects between chips. IEEE J. Sel. Top. Quantum Electron. 4(6), 1040–1045 (1998)
L.D. Garrett, J. Qi, C.L. Schow, J.C. Campbell, A silicon-based integrated NMOS-p-i-n photoreceiver. IEEE Trans. Electron Devices 43(3), 411–416 (1996)
S. He, L.D. Garrett, K.-H. Lee, J.C. Campbell, Monolithic integrated silicon NMOS PIN photoreceiver. Electron. Lett. 30(22), 1887–1888 (1994)
S.M. Sze, VLSI Technology (McGraw-Hill, New York, 1988)
T. Hori, J. Hirase, Y. Odake, T. Yasui, Deep-submicrometer large-angle-tilt implanted drain (LATID) technology. IEEE Trans. Electron Devices 39(10), 2312–2324 (1992)
H. Zimmermann, Monolithic Bipolar-, CMOS-, and BiCMOS-receiver OEICs, in Proceedings of the International Semiconductor Conference (CAS’96) (Sinaia, Romania, 1996), pp. 31–40
H. Zimmermann, T. Heide, A. Ghazi, Monolithic high-speed CMOS-photoreceiver. IEEE Photonics Technol. Lett. 11(2), 254–256 (1999)
H. Zimmermann, U. Müller, R. Buchner, P. Seegebrecht, Optoelectronic receiver circuits in CMOS-technology, Mikroelektronik’97, GMM-Fachbericht 17 (VDE-Verlag, Berlin, Offenbach, 1997), pp. 195–202
H. Zimmermann, T. Heide, A. Ghazi, K. Kieschnick, PIN-CMOS-receivers for optical interconnects, in Ext. Abstr. 2nd IEEE Workshop on Signal Propagation on Interconnects, Travemünde, Germany (1998), pp. 88–89
H. Zimmermann, A. Ghazi, T. Heide, R. Popp, R. Buchner, in Proceedings of the 49th Electronic Components and Technology Conference (ECTC) (1999), pp. 1030–1035
R.A. Chapman, R.A. Haken, D.A. Bell, C.C. Wei, R.H. Havemann, T.E. Tang, T.C. Holloway, R.J. Gale, An 0.8 \(\upmu \)m CMOS technology for high performance logic applications, in IEDM Digest Technical Papers (1987), pp. 362–365
P. Pavan, G. Spiazzi, E. Zanoni, M. Muschitiello, M. Cecchetti, Latch-up DC triggering and holding characteristics of n-well, twin-tub and epitaxial CMOS technologies. IEE Proc.-G 138(5), 605–612 (1991)
H. Zimmermann, T. Heide, A. Ghazi, P. Seegebrecht, PIN-CMOS-receivers for optical interconnects, in Signal Propagation on Interconnects, vol. II, ed. by H. Grabinski (Kluwer, Amsterdam, 1999)
A. Ghazi, T. Heide, H. Zimmermann, PIN CMOS OEIC for DVD systems, in Proceedings of the 43rd International Scientific Colloquium, TU Ilmena, vol. 2 (Germany, 1998), pp. 380–385
H. Zimmermann, Integrated Silicon Optoelectronics (Springer, Berlin, 2000)
P. Brandl, S. Schidl, H. Zimmermann, PIN photodiode optoelectronic integrated receiver used for 3-Gb/s free-space optical communication. IEEE J. Sel. Top. Quantum Electron. 20(6), 6000510 (2014)
M. Davidovic, T. Wimbauer, H. Zimmermann, PIN photodiode in 0.15 \(\upmu \)m CMOS. IET Electron. Lett. 50(17), 1229–1231 (2014)
W.S. Boyle, G.E. Smith, Charge coupled semiconductor devices. Bell Syst. Tech. 49(4), 587–593 (1970)
E.G. Stevens, B.C. Burkey, D.N. Nicols, Y.S. Yee, D.L. Losee, T.-H. Lee, T.J. Tredwell, R.P. Khosla, A 1-megapixel, progressive-scan image sensor with antiblooming control and lag-free operation. IEEE Trans. Electron Devices 38(5), 981–988 (1991)
T. Kuriyama, H. Kodama, T. Kozono, Y. Kitahama, Y. Morita, Y. Hiroshima, A 1/3-in 270000 pixel CCD image sensor. IEEE Trans. Electron Devices 38(5), 949–953 (1991)
S. Kawai, N. Mutoh, N. Teranishi, Thermionic-emission-based barrier height analysis for precise estimation of charge handling capacity in CCD registers. IEEE Trans. Electron Devices 44(10), 1588–1592 (1997)
J.P. Lavine, E.K. Banghart, The effect of potential obstacles on charge transfer in image sensors. IEEE Trans. Electron Devices 44(10), 1593–1598 (1997)
R. Miyagawa, T. Kanade, CCD-based range-finding sensor. IEEE Trans. Electron Devices 44(10), 1648–1652 (1997)
T. Spirig, M. Marley, P. Seitz, The multitap lock-in CCD with offset subtraction. IEEE Trans. Electron Devices 44(10), 1643–1647 (1997)
B.E. Burke, J.A. Gregory, M.W. Bautz, G.Y. Prigozhin, S.E. Kissel, B.B. Kosiki, A.H. Loomis, D.J. Young, Soft-X-ray CCD imagers for AXAF. IEEE Trans. Electron Devices 44(10), 1633–1642 (1997)
K. Itakura, T. Nobusada, Y. Saitou, N. Kokusenya, R. Nagayoshi, M. Ozaki, Y. Sugawara, K. Mitani, Y. Fujita, A 2/3-in 2.0 M-pixel CCD imager with an advanced M-FIT architecture capable of progressive scan. IEEE Trans. Electron Devices 44(10), 1625–1632 (1997)
K. Tachikawa, T. Umeda, Y. Oda, T. Kuroda, Device design with automatic simulation system for basic CCD characteristics. IEEE Trans. Electron Devices 44(10), 1611–1616 (1997)
T. Yamada, Y. Kawakami, T. Nakano, N. Mutoh, K. Orihara, N. Teranishi, Driving voltage reduction in a two-phase CCD by suppression of potential pockets in inter-electrode gaps systems. IEEE Trans. Electron Devices 44(10), 1580–1587 (1997)
B.E. Burke, R.K. Reich, J.A. Gregory, W.H. McGonagle, A.M. Waxman, E.D. Savoye, B.B. Kosiki, 640 \(\times \) 480 back-illuminated CCD imager with improved blooming control for night vision, in IEDM Digest Technical Papers (1998), pp. 33–36
J.T. Bosiers, A.C. Kleinman, A. van der Sijde, L. Korthout, D.W. Verbugt, H.L. Peek, E. Roks, A. Heringa, F.F. Vledder, P. Opmeer, A 2/3” 2-M pixel progressive scan FT-CCD for digital still camera applications, in IEDM Digest Technical Papers (1998), pp. 37–40
A. Tanabe, Y. Kudoh, Y. Kawakami, K. Masubuchi, S. Kawai, T. Yamada, M. Morimoto, K. Arai, K. Hatano, M. Furumiya, Y. Nakashiba, N. Mutoh, K. Orihara, N. Teranishi, Dynamic range improvement by narrow-channel effect suppression and smear reduction technologies in small pixel IT-CCD image sensors, in IEDM Digest Technical Papers (1998), pp. 41–44
H. Fiedler, K. Knupfer, Market overview: charge-coupled devices, in Sensors Update, vol. 1, ed. by H. Baltes, W. Göpel, J. Hesse (VCH, Weinheim, 1996), pp. 223–271
P. Seitz, K. Knop, Image sensors, in Sensors Update, vol. 2, ed. by H. Baltes, W. Göpel, J. Hesse (VCH, Weinheim, 1996), pp. 85–103
Y. Hagiwara, High-density and high-quality frame transfer CCD imager with very low smear, low dark current, and very high blue sensitivity. IEEE Trans. Electron Devices 43(12), 2122–2130 (1996)
J. Hynecek, Low-noise and high-speed charge detection in high-resolution CCD image sensors. IEEE Trans. Electron Devices 44(10), 1679–1688 (1997)
N. Tanaka, N. Nakamura, Y. Matsunaga, S. Manabe, H. Tango, O. Yoshida, A low driving voltage CCD with single layer electrode structure for area image sensor. IEEE Trans. Electron Devices 44(11), 1869–1874 (1997)
S.M. Sze, Physics of semiconductor devices (Wiley, New York, 1981), p. 412
R.H. Walden, R.H. Krambeck, R.J. Strain, J. McKenna, N.L. Schryer, G.E. Smith, The buried channel charge coupled device. Bell Syst. Tech. 51, 1635–1640 (1972)
M.M. Blouke, J.R. Janesick, J.E. Hall, M.W. Cowens, P.J. May, 800 \(\times \) 800 charge coupled device image sensor. Opt. Eng. 22(5), 607–614 (1983)
Y. Ishihara, E. Oda, H. Tanigawa, A. Kohno, N. Teranishi, E.-I. Takeuchi, I. Akiyama, T. Kamata, Interline CCD image sensor with an antiblooming structure. IEEE Trans. Electron Devices 31(1), 83–88 (1984)
N. Teranishi, Y. Ishihara, Smear reduction in interline CCD image sensor. IEEE Trans. Electron Devices 34(5), 1052–1056 (1987)
E. Oda, K. Orihara, T. Tanaka, T. Kamata, Y. Ishihara, 1/2-in 768(H) \(\times \) 492(V) pixel CCD image sensor. IEEE Trans. Electron Devices 36(1), 46–53 (1989)
K. Knop, Image sensors, in Optical Sensors, ed. by W. Göpel, J. Hesse, J.N. Zemel (VCH, Weinheim, 1992), pp. 233–252
P. Centen, CCD on-chip amplifiers: noise performance versus MOS transistor dimensions. IEEE Trans. Electron Devices 38(5), 1206–1216 (1991)
J. Hojo, Y. Naito, H. Mori, K. Fujikawa, N. Kato, T. Wakayama, E. Komatsu, M. Itasaka, A 1/3-in 510(H) \(\times \) 492(V) CCD image sensor with mirror image function. IEEE Trans. Electron Devices 38(5), 954–959 (1991)
N. Mutoh, Simulation for 3-D optical and electrical analysis of CCD. IEEE Trans. Electron Devices 44(10), 1604–1610 (1997)
M. Yamagishi, M. Negishi, H. Yamada, T. Tsunakawa, K. Shinohara, T. Ishimaru, Y. Kamide, Y. Yamazaki, H. Abe, H. Kanbe, Y. Tomiya, K. Yonemoto, T. Iizuka, S. Nakamura, K. Harada, K. Wada, A 2 million pixel FIT-CCD image sensor for HDTV camera systems. IEEE Trans. Electron Devices 38(5), 976–980 (1991)
G. Williams, J. Janesick, Cameras with CCD’s capture new markets, Laser Focus World, Detector Handbook (1996), pp. S5–S9
A.L. Lattes, S.C. Munroe, M.M. Seaver, Ultrafast shallow-buried-channel CCD’s with built-in drift fields. IEEE Electron Device Lett. 12(2), 104–107 (1991)
T. Satoh, N. Mutoh, M. Furumiya, I. Murakami, S. Suwazono, C. Ogawa, K. Hatano, H. Utsumi, S. Kawai, K. Arai, M. Morimoto, K. Orihara, T. Tamura, N. Teranishi, Y. Hokari, Optical limitations to cell size reduction in IT-CCD image sensors. IEEE Trans. Electron Devices 44(10), 1599–1603 (1997)
R. Dawson, J. Preisig, J. Carnes, J. Pridgen, CMOS/buried-N-channel CCD compatible process for analog signal processing applications. RCA Rev. 38, 406–435 (1977)
D. Ong, An all-implanted CCD/CMOS process. IEEE Trans. Electron Devices 28(1), 6–12 (1981)
E.R. Fossum, CMOS image sensors: electronic camera-on-a-chip. IEEE Trans. Electron Devices 44(10), 1689–1698 (1997)
A. Simoni, A. Sartori, M. Gottardi, A. Zorat, A digital vision sensor. Sens. Actuators A 46–47, 439–443 (1995)
P. Noble, Self-scanned silicon image detector arrays. IEEE Trans. Electron Devices 15(4), 202–209 (1968)
F. Andoh, K. Taketoshi, J. Yamazaki, M. Sugawara, Y. Fujita, F. Mitani, Y. Matuzawa, K. Miyata, S. Araki, A 250000 pixel image sensor with FET amplification at each pixel for high-speed television cameras, in ISSCC Digest Technical Papers (1990), pp. 212–213
H. Kawashima, F. Andoh, N. Murata, K. Tanaka, M. Yamawaki, K. Taketoshi, A 1/4 inch format 250000 pixel amplifier MOS image sensor using CMOS process, in IEDM Digest Technical Papers (1993), pp. 575–578
M. Sugawara, H. Kawashima, F. Andoh, N. Murata, Y. Fujita, M. Yamawaki, An amplified MOS imager suited for image processing, in ISSCC Digest Technical Papers (1994), pp. 228–229
E. Oba, K. Mabuchi, Y. Iida, N. Nakamura, H. Miura, A 1/4 inch 330 k square pixel progressive scan CMOS active pixel image sensor, in ISSCC Digest Technical Papers (1997), pp. 180–181
C. Aw, B. Wooley, A 128 \(\times \) 128 pixel standard CMOS image sensor with electronic shutter. IEEE J. Solid-State Circuits 31(12), 1922–1930 (1996)
R.H. Nixon, S.E. Kemeny, B. Pain, C.O. Staller, E.R. Fossum, 256 \(\times \) 256 CMOS active pixel sensor camera-on-a-chip. IEEE J. Solid-State Circuits 31(12), 2046–2050 (1996)
R.H. Nixon, S.E. Kemeny, R.C. Gee, B. Pain, Q. Kim, E.R. Fossum, CMOS active pixel image sensors for highly integrated imaging systems. IEEE J. Solid-State Circuits 32(2 (Feb.)), 187–197 (1997)
O. Yadid-Pecht, E.R. Fossum, Wide intrascene dynamic range CMOS APS using dual sampling. IEEE Trans. Electron Devices 44(10), 1721–1723 (1997)
Z. Zhou, B. Pain, E.R. Fossum, CMOS active pixel sensor with on-chip successive approximation analog-to-digital converter. IEEE Trans. Electron Devices 44(10), 1759–1763 (1997)
Z. Zhou, B. Pain, E.R. Fossum, Frame-transfer CMOS active pixel sensor with pixel binning. IEEE Trans. Electron Devices 44(10), 1764–1768 (1997)
G. Yang, O. Yadid-Pecht, C. Wrigley, B. Pain, A snap-shot CMOS active pixel imager for low-noise, high-speed imaging, in IEDM Digest Technical Papers (1998), pp. 45–48
D. Scheffer, B. Dierickx, G. Meynants, Random addressable 2048 \(\times \) 2048 active pixel image sensor. IEEE Trans. Electron Devices 44(10), 1716–1720 (1997)
F. Pardo, B. Dierickx, D. Scheffer, CMOS foveated image sensor: signal scaling and small geometry effects. IEEE Trans. Electron Devices 44(10), 1731–1737 (1997)
A. Dickinson, B. Auckland, E.-S. Eid, D. Inglis, E.R. Fossum, A 256 \(\times \) 256 CMOS active pixel image sensor with motion detection, in ISSCC (1995), pp. 226–227
R.M. Guidash, T.-H. Lee, P.P.K. Lee, D.H. Sackett, C.I. Drowley, M.S. Swenson, L. Arbaugh, R. Hollstein, F. Shapiro, S. Domer, A 0.6 \(\upmu \)m CMOS pinned photodiode color imager technology, in IEDM Digest Technical Papers (1997), pp. 927–929
S. Mendis, S.E. Kemeny, E.R. Fossum, CMOS active pixel image sensor. IEEE Trans. Electron. Devices 41, 452–453 (1994)
M.-H. Chi, Technologies for high performance CMOS active pixel imaging system-on-a-chip, in Proceedings of the 5th International Conference on Solid-State and Integrated-Circuit Technology (1998), pp. 180–183
H. Totsuka, T. Tsuboi, T. Muto, D. Yoshida, Y. Matsuno, M. Ohmura, H. Takahashi, K. Sakurai, T. Ichikawa, H. Yuzurihara, S. Inoue, An APS-H-size 250 Mpixel CMOS image sensor using column single-slope ADCs with dual-gain amplifiers, in Proceedings IEEE International Solid-State Circuits Conference (2016), pp. 116–117
T. Toyama, K. Mishina, H. Tsuchiya, T. Ichikawa, H. Iwaki, Y. Gendai, H. Murakami, K. Takamiya, H. Shiroshita, Y. Muramatsu, T. Furusawa, A 17.7 Mpixel 120 fps CMOS image sensor with 34.8 Gb/s readout, in Proceedings IEEE International Solid-State Circuits Conference (2011), pp. 420–421
M.F. Snoeji, P. Donegan, A.J.P. Theuwissen, K.A.A. Makinwa, J.H. Huijsing, A CMOS image sensor with a column-level multiple-ramp single-slope ADC, in Proceedings IEEE International Solid-State Circuits Conference (2007), pp. 506–507
J. Bogaerts, R. Lafaille, J. Guo, B. Ceulemans, G. Meynants, N. Sarhangnejad, G. Arsinte, V. Statescu, S. van der Groen, 105\(\times \)65 mm\(^2\) 391 Mpixel CMOS image sensor with \(>\)78 dB dynamic range for airborne map** applications, in Proceedings IEEE International Solid-State Circuits Conference (2016), pp. 114–115
J. Bosiers, E.-J.P. Manoury, W. Klaassens, H. Stoldt, R.L.J. Leenen, H. van Kuijk, H.L. Peek, W.T.F.M. de Laat, Recent developments on large-area CCDs for professional applications, in International Image Sensor Workshop (IISW) (2015)
T. Arai, T. Yasue, K. Kitamura, H. Shimamoto, T. Kosugi, S. Jun, S. Aoyama, M.-C. Hsu, Y. Yamashita, H. Sumi, S. Kawahito, A 1.1 \(\upmu \)m 33 Mpixel 240 fps 3D-stacked CMOS image sensor with 3-stage cyclic-based analog-to-digital converters, in Proceedings IEEE International Solid-State Circuits Conference (2016), pp. 126–127
C.C.-M. Liu, C.-H. Chang, H.-Y. Tu, C.Y.-P. Chao, F.-L. Hsueh, S.-Y. Chen, V. Hsu, J.-C. Liu, D.-N. Yaung, S.-G. Wuu, A peripheral switchable 3D stacked CMOS image sensor, in Proceedings Symposium on VLSI Circuits (2014), pp. 1–2
C.C.-M. Liu, M.M. Mhala, C.-H. Chang, H. Tu, P.-S. Chou, C. Chao, F.-L. Hsueh, A 1.5 V 33 Mpixel 3D-stacked CMOS image sensor with negative substrate bias, in Proceedings IEEE International Solid-State Circuits Conference (2016), pp. 124–125
K. Kitamura, T. Watabe, T. Sawamoto, T. Kosugi, T. Akahori, T. Iida, K. Isobe, T. Watanabe, H. Shimamoto, H. Ohtake, S. Aoyama, S. Kawahito, N. Egami, A 33 Megapixel 120 frames-per-second 2.5 W CMOS image sensor with column-parallel two-stage cyclic analog-to-digital converters. IEEE Trans. Electron Devices 59(12), 3426–3433 (2012)
T. Haruta, T. Nakajima, J. Hashizume, T. Umebayashi, H. Takahashi, K. Taniguchi, M. Kuroda, H. Sumihiro, K. Enoki, T. Yamasaki, K. Ikezawa, A. Kitahara, M. Zen, M. Oyama, H. Koga, H. Tsugawa, T. Ogita, T. Nagano, S. Takano, T. Nomoto, A 1/2.3inch 20 Mpixel 3-layer stackedCMOS image sensor with DRAM, in Proceedings IEEE International Solid-StateCircuits Conference (2017), pp. 76–77
N.A.W. Dutton, L. Parmesan, A.J. Holmes, L.A. Grant, R.K. Henderson, 320 \(\times \) 240 oversampled digital single photon counting image sensor, in Proceedings Symposium on VLSI Circuits (2014), pp. 147–148
M. Mori, Y. Sakata, M. Usudaa, S. Yamahira, S. Kasuga, Y. Hirose, Y. Kato, T. Tanaka, A 1280 \(\times \) 720 single-photon-detecting image sensor with 100 dB dynamic range using a sensitivity-boosting technique, in Proceedings IEEE International Solid-State Circuits Conference (2016), pp. 120–121
M. Kunii, K. Hasegawa, H. Oka, Y. Nakazawa, T. Takeshita, H. Kurihara, Performance of a high-resolution contact-type linear image sensor with a-Si:H/a-SiC: H heterojunction photodiodes. IEEE Trans. Electron Devices 36(12), 2877–2881 (1989)
H. Kakinuma, M. Sakamoto, Y. Kasuya, H. Sawai, Characterisitics of Cr Schottky amorphous silicon photodiodes and their application in linear image sensors. IEEE Trans. Electron Devices 37(1), 128–133 (1990)
L.E. Antonuk, J. Boudry, Y. El-Mohri, W. Huang, J. Siewerdsen, J. Yorkston, R.A. Street, A high-resolution, high frame rate flatpanel TFT array for digital X-Ray imaging, in SPIE, Physics of Medical Imaging vol. 2163 (1994), pp. 118–127
N.C. Bird, C.J. Curling, C. van Berkel, Large-area image sensing using amorphous silicon NIP diodes. Sens. Actuators 46–47, 444–448 (1995)
X.D. Wu, R.A. Street, R. Weisfield, S. Ready, S. Nelson, Page sized a-Si:H two-dimensional array as imaging devices, in Proceedings of the 4th International Conference on Solid-State and Integrated-Circuit Technology (1995), pp. 724–726
E.D. Palik, Handbook of Optical Constants of Solids (Academic Press Inc, Orlando, 1985), pp. 571–586
R.H. Bube, Solar cells, in Handbook on Semiconductors, Device Physics, vol. 4, ed. by C. Hilsum (North-Holland, Amsterdam, 1993), pp. 825–826
M. Böhm, F. Blecher, A. Eckhardt, B. Schneider, S. Benthien, H. Keller, T. Lule, P. Rieve, M. Sommer, R.C. Lind, L. Humm, M. Daniels, N. Wu, High dynamic range image sensors in thin film on ASIC - technology for automotive applications, in Advanced Microsystems for Automotive Applications, ed. by D.E. Ricken, W. Gessner (Springer, Berlin, Heidelberg, 1998), pp. 157–172
B. Schneider, H. Fischer, S. Benthien, H. Keller, T. Lule, P. Rieve, M. Sommer, J. Schulte, M. Böhm, TFA image sensors: from the one transistor cell to a locally adaptive high dynamic range sensor, in IEDM Digest Technical Papers (1997), pp. 209–212
H. Fischer, J. Schulte, P. Rieve, M. Böhm, Technology and performance of TFA (Thin Film on ASIC)-sensors. Mater. Res. Soc. Symp. Proc. 336, 867–872 (1994)
J. Schulte, H. Fischer, T. Lule, Q. Zhu, M. Böhm, Properties of TFA (Thin Film on ASIC) sensors, in Micro System Technologies, ed. by H. Reichl, A. Heuberger (1994), pp. 783–790
M.P. Vidal, M. Bafleur, J. Buxo, G. Sarrabayrouse, A bipolar photodetector compatible with standard CMOS technology. Solid-State Electron. 34(8), 809–814 (1991)
E.A. Vittoz, MOS transistors operated in the lateral bipolar mode and their application in CMOS technology. IEEE J. Solid-State Circuits 18(6), 273–279 (1983)
R.W. Sandage J.A. Connelly, A fingerprint opto-detector using lateral bipolar phototransistors in a standard CMOS process, in IEDM Digest Technical Papers (1995), pp. 171–174
W.T. Holman, J.A. Connelly, A compact low-noise operational amplifier for a 1.2 \(\upmu \)m digital CMOS technology. IEEE J. Solid-State Circuits 30(6), 710–714 (1995)
H. Beneking, Gain and bandwidth of fast near-infrared photodetectors: a comparison of diodes, phototransistors, and photoconductive devices. IEEE Trans. Electron Devices 29(9), 1420–1430 (1982)
R. Schwarte, Z. Xu, H. Heinol, J. Olk, R. Klein, B. Buxbaum, H. Fischer, J. Schulte, A new electrooptical mixing and correlating sensor: facilities and applications of the photonic mixer device (PMD), in Proceedings of the SPIE — Sensors, Sensor Systems, and Sensor Data Processing, vol. 3100 (1997), pp. 245–253
R. Schwarte, Dynamic 3D-vision, in Proceedings of the IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications (2001), pp. 241–248
K. Oberhauser, G. Zach, A. Nemecek, H. Zimmermann, Time-of-flight based pixel architecture with integrated double-cathode photodetector, in Proceedings of the SPIE vol. 6616 (2007), pp. 66160C–1–66160C–9
A. Nemecek and H. Zimmermann, Gate-controlled photodetector in PIN technology for distance measurement, in Proceedings of the International Semiconductor Device Research Symposium (ISDRS) (2007), pp. CFP07511–CDR
A. Nemecek, G. Zach, H. Zimmermann, Correlating photodetector with current carrying photogate for time-of-flight distance measurement, in Proceedings of the SPIE, vol. 7003 (2008), pp. 70030L–1–70030L–8
A. Nemecek, H. Zimmermann, Buried finger concept for a correlating double cathode photodetector in BiCMOS, in Proceedings of the European Solid State Device Research Conference (ESSDERC) (2010), pp. 261–264
C.S. Bamji, P. O’Connor, T. Elkhabit, S. Mehta, B. Thompson, L.A. Prather, D. Snow, O.C. Akkaya, A. Daniel, A.D. Payne, T. Perry, M. Fenton, V.-H. Chan, A 0.13 \(\upmu \)m CMOS system-on-chip for a 512 \(\times \) 424 time-of-flight image sensor with multi-frequency photo-demodulation up to 130 MHz and 2 GS/s ADC. IEEE J. Solid-State Circuits 50(1), 303–319 (2015)
B. Ciftcioglu, J. Zhang, L. Zhang, J.R. Marciante, J.D. Zuegel, R. Sobolewski, H. Wu, 3-GHz silicon photodiodes integrated in a 0.18-\(\upmu \)m CMOS technology. IEEE Photonics Technol. Lett. 20(24), 2069–2071 (2008)
F.-P. Chou, C.-W. Wang, Z.-Y. Li, Y.-C. Hsieh, Y.-M. Hsin, Effect of deep n-well bias in an 850-nm Si photodiode fabricated using the CMOS process. IEEE Photonics Technol. Lett. 25(7), 659–662 (2013)
M.-J. Lee, W.-Y. Choi, A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product. Opt. Exp. 18(23), 24189–24194 (2010)
J.-S. Youn, M. Lee, K.-Y. Park, W.-Y. Choi, 10-Gb/sw 850 nm CMOS OEIC receiver with a silicon avalanche photodetector. IEEE J. Quantum Electron. 48(2), 229–236 (2012)
M. Atef, A. Polzer, H. Zimmermann, Avalanche double photodiode in 40-nm standard CMOS technology. IEEE J. Quantum Electron. 49(3), 350–356 (2013)
M.-J. Lee, W.-Y. Choi, Performance optimization and improvement of silicon avalanche photodetectors in standard CMOS technology. IEEE J. Sel. Top. Quantum Electron. 24(2), 3801013 (2018)
C.-K. Tseng, K.-H. Chen, W.-T. Chen, M.-C.M. Lee, N. Na, A high-speed and low-breakdown-voltage silicon avalanche photodetector. IEEE Photonics Technol. Lett. 26(6), 591–594 (2014)
B. Steindl, R. Enne, S. Schidl, H. Zimmermann, Linear mode APD with high responsivity integrated in high-voltage CMOS. IEEE Electron Device Lett. 35(9), 897–899 (2014)
P. Brandl, R. Enne, T. Jukic, H. Zimmermann, OWC using a fully integrated optical receiver with large-diameter APD. IEEE Photonics Technol. Lett. 27(5), 482–485 (2015)
W. Gaberl, K. Schneider-Hornstein, R. Enne, B. Steindl, H. Zimmermann, Avalanche photodiode with high responsivity in 0.35 \(\upmu \)m CMOS. SPIE Opt. Eng. 53(4), 043105–1–043105–4 (2014)
B. Steindl, W. Gaberl, R. Enne, S. Schidl, K. Schneider-Hornstein, H. Zimmermann, Linear mode avalanche photodiode with 1-GHz bandwidth fabricated in 0.35 \(\upmu \)m CMOS. IEEE Photonics Technol. Lett. 26(15), 1511–1514 (2014)
R. Enne, B. Steindl, H. Zimmermann, Improvement of CMOS-integrated vertical APDs by applying lateral well modulation. IEEE Photonics Technol. Lett. 27(18), 1907–1910 (2015)
R. Enne, B. Steindl, H. Zimmermann, Speed optimized linear-mode high-voltage CMOS avalanche photodiodes with high responsivity. Opt. Lett. 40(19), 4400–4403 (2015)
B. Steindl, T. Jukic, H. Zimmermann, Optimized silicon CMOS reach-through avalanche photodiode with 2.3-GHz bandwidth. SPIE Opt. Eng. 56(11), pp. 110501–110501–3 (2017)
T. Jukic, P. Brandl, H. Zimmermann, Determination of the excess noise of avalanche photodiodes intergated in 0.35 \(\upmu \)m CMOS technologies. SPIE Opt. Eng. 57(4), 044101-1–044101-5 (2018)
H. Finkelstein, M.J. Hsu, S.C. Esener, STI-bounded single-photon avalanche diode in a deep-submicrometer CMOS technology. IEEE Electron Device Lett. 27(11), 887–889 (2006)
J.A. Richardson, L.A. Grant, R.K. Henderson, Low dark count single-photon avalanche diode structure compatible with standard nanometer scale CMOS technology. IEEE Photonics Technol. Lett. 21, 1020–1022 (2009)
C. Niclass, K. Ito, M. Soga, H. Matsubara, I. Aoyagi, S. Kato, M. Kagami, Design and characterization of a 256\(\times \)64-pixel single-photon imager in CMOS for a MEMS-based laser scanning time-of-flight sensor. Opt. Exp. 20, 11863–11881 (2012)
Y. Maruyam, J.R. Blacksberg, E. Charbon, A 1024\(\times \)8 700 ps time-gated SPAD line sensor for laser Raman spectroscopy and LIBS in space and rover-based planetary exploration, in Proceedings of the IEEE International on Solid-State Circuits Conference, pp. 110–111, 2013
C. Veerappan, E. Charbon, A low darc count P-I-N diode based SPAD in CMOS technology. IEEE Trans. Electron Devices 63(1), 65–71 (2016)
S. Lindner, S. Pellegrini, Y. Henrion, B. Rae, W. Wolf, E. Charbon, A high-PDE, backside-illuminated SPAD in 65/40-nm 3D IC CMOS pixel with cascoded passive quenching and active recharge. IEEE Electron Device Lett. 38(11), 1547–1550 (2017)
B. Steindl, R. Enne, H. Zimmermann, Thick detection zone single-photon avalanche diode fabricated in 0.35 \(\upmu \)m complementary metal-oxide semiconductors. SPIE Opt. Eng. 54(5), 050503-1–050503-3 (2015)
E.G. Webster, L.A. Grant, R.K. Henderson, A high-performance single-photon avalanche diode in 130-nm CMOS imaging technology. IEEE Electron Device Lett. 33(11), 1589–1591 (2012)
E.G. Webster, J.A. Richardson, L.A. Grant, D. Renshaw, R.K. Henderson, A single-photon avalanche diode in 90-nm CMOS imaging technology with 44% photon detection efficiency at 690 nm. IEEE Electron Device Lett. 33(5), 694–696 (2012)
S. Mandai, M.W. Fishburn, Y. Maruyama, E. Charbon, A wide spectral range single-photon avalanche diode fabricated in an advanced 180 nm CMOS technology. Opt. Exp. 20(6), 5849–5857 (2012)
C. Niclass, H. Matsubara, M. Soga, M. Ohta, M. Ogawa, T. Yamashita, A NIR-sensitivity-enhanced single-photon avalanche diode in 0.18 \(\upmu \)m CMOS, in Proceedings of the International Image Sensor Workshop (2015), pp. 11–4
I. Takai, H. Matsubara, M. Soga, M. Ohta, M.O.T. Yamashita, Single-photon avalanche diode with enhanced NIR-sensitivity for automotive LIDAR systems. Sensors 16, 459 (2016)
H. Zimmermann, B. Steindl, M. Hofbauer, R. Enne, Integrated fiber optical receiver reducing the gap to the quantum limit. Sci. Rep. 7, 2652 (2017)
S. Wolf, Silicon processing for the VLSI era, Vol. 2 – Process integration (Lattice Press, Sunset Beach, 1990)
R.H. Havemann, R.H. Eklund, Process integration issues for submicron BiCMOS technology. Solid State Technol. 6, 71–76 (1992)
T. Ikeda, A. Watanabe, Y. Nishio, I. Masuda, N. Tamba, M. Odaka, K. Ogiue, High-speed BiCMOS technology with a buried twin well structure. IEEE Trans. Electron Devices 34(6), 1304–1310 (1987)
S.S. Ahmed, W.W. Asakawa, M.T. Bohr, S.S. Chambers, T. Deeter, M. Denham, J.K. Greason, W.W. Holt, R.R. Taylor, I. Young, A triple diffused approach for high performance 0.8 \(\upmu \)m BiCMOS technology. Solid State Technol. 10, 33–40 (1992)
R.A. Chapman, D.A. Bell, R.H. Eklund, R.H. Havemann, M.G. Harward, R.A. Haken, Submicrometer BiCMOS well design for optimum circuit performance, in IEDM Digest Technical Papers (1988), pp. 756–759
H. Iwai, G. Sasaki, Y. Unno, Y. Niitsu, M. Norishima, Y. Sugimoto, K. Kanzaki, 0.8-\(\upmu \)m Bi-CMOS technology with high \(f_{\rm T}^{\prime \prime }\) ion-implanted emitter bipolar transistor, in IEDM Digest Technical Papers (1987), pp. 28–31
T.-Y. Chiu, G.M. Chin, M.Y. Lau, R.C. Hanson, M.D. Morris, K.F. Lee, A.M. Voshchenkov, R.G. Swartz, V.D. Archer, M.T.Y. Liu, S.N. Finegan, M.D. Feuer, Non-overlap** super self-aligned BiCMOS with 87 ps low power ECL, in IEDM Digest Technical Papers (1988), pp. 752–755
W.R. Burger, C. Lage, T. Davies, M. DeLong, D. Haueisen, J. Small, G. Huglin, A. Landau, F. Whitwer, B. Bastani, An advanced self-aligned BICMOS technology for high performance 1-megabit ECL i/O SRAMs, in IEDM Digest Technical Papers (1989), pp. 421–424
Y. Kobayashi, C. Yamaguchi, Kobayashi, Y. Amemiya, T. Sakai, High perfomance LSI process technology: SST CBi-CMOS, in IEDM Digest Technical Papers (1988), pp. 760–763
K. Sakaue, Y. Shobatake, M. Motoyama, Y. Kumaki, S. Takatsuka, S. Tanaka, H. Hara, K. Matsuda, S. Kitaoka, M. Noda, Y. Niitsu, M. Norishima, H. Momose, K. Maeguchi, M. Ishibe, S. Shimizu, T. Kodama, A 0.8-\(\upmu \)m BiCMOS ATM switch on an 800-Mb/s asynchronous buffered banyan network. IEEE J. Solid-State Circuits 26(8), 1133–1144 (1991)
M. El-Diwany, J. Borland, J. Chen, S. Hu, P. v. Wijnen, C. Vorst, V. Akylas, M. Brassington, R. Razouk, An advanced BiCMOS process utilizing ultra-thin silicon epitaxy over arsenic buried layers, in IEDM Digest Technical Papers (1989), pp. 245–248
M. Norishima, Y. Niitsu, G. Sasaki, H. Iwai, K. Maeguchi, Bipolar transistor design for low process-temperature 0.5 \(\upmu \)m BI-CMOS, in IEDM Digest Technical Papers (1989), pp. 237–240
P.J.-W. Lim, A.Y.C. Tzeng, H.L. Chuang, S.A.S. Onge, A 3.3 V monolithic photodetector/CMOS preamplifier for 531 Mb/s optical data link applications, in ISSCC (1993), pp. 96–97
D.M. Kuchta, H.A. Ainspan, F.J. Canora, R.P. Schneider, Performance of fiber-optic data links using 670 nm CW VCSELs and a monolithic Si photodetector and CMOS preamplifier. IBM J. Res. Develop. 39(1/2), 63–72 (1995)
H. Zimmermann, K. Kieschnick, M. Heise, H. Pless, BiCMOS OEIC for optical storage systems. Electron. Lett. 34(19), 1875–1876 (1998)
H. Zimmermann, Full custom CMOS and BiCMOS OPTO-ASICs, in Proceedings of the 5th International Conference on Solid-State and Integrated-Circuit Technology (1998), pp. 344–347
K. Kieschnick, H. Zimmermann, P. Seegebrecht, Silicon-based optical receivers in BiCMOS technology for advanced optoelectronic integrated circuits, in Proceedings of the European Materials Research Society Meeting (E-MRS), Strasbourg, 1–4 June 1999 (1999)
H. Zimmermann, K. Kieschnick, M. Heise, H. Pless, High-bandwidth BiCMOS OEIC for optical storage systems, in IEEE International on Solid-State Circuits Conference (1999), pp. 384–385
K. Kieschnick, T. Heide, A. Ghazi, H. Zimmermann, P. Seegebrecht, High-speed photonic CMOS and BiCMOS receiver ICs, in Proceedings of the 25th European Solid-State Circuits Conference (ESSCIRC) (1999), pp. 398–401
S. Groiss, J. Sturm, Low-noise sampling system for photocurrent detection with monolithically integrated photodiodes, in Proceedings of the 27th European Solid-State Circuits Conference (ESSCIRC) (2001), pp. 180–183
J. Sturm, S. Hainz, G. Langguth, H. Zimmermann, Integrated photodiodes in standard BiCMOS technology, in Proceedings of the SPIE, vol. 4997B (2003)
K. Kieschnick, H. Zimmermann, H. Pless, P. Seegebrecht, Integrated photodiodes for DVD and CD-ROM applications, in Proceedings of the 30th European Solid-State Device Conference (ESSDERC) (2000), pp. 252–255
H. Zimmermann, K. Kieschnick, Low-offset BiCMOS OEIC for optical storage systems. Electron. Lett. 36(14), 1223–1224 (2000)
G.W. de Jong, J.R.M. Bergervoet, J.H.A. Brekelmans, J.F.P. van Mil, A DC-to-250 MHz current pre-amplifier with integrated photodiodes in standard CBiMOS for optical storage systems, in ISSCC (2002), pp. 362–363
M. Förtsch, H. Zimmermann, W. Einbrodt, K. Bach, H. Pless, Integrated PIN photodiodes in high-performance BiCMOS technology, in IEDM Digest Technical Papers (2002), pp. 801–804
R. Swoboda, K. Schneider-Hornstein, H. Wille, G. Langguth, H. Zimmermann, BiCMOS-integrated photodiode exploiting drift enhancement. Opt. Eng. 53(8), pp. 087103-1-087103-4 (2014)
A. Nemecek, G. Zach, R. Swoboda, K. Oberhauser, H. Zimmermann, Integrated BiCMOS p-i-n photodetectors with high bandwidth and high responsivity. IEEE J. Sel. Top. Quantum Electron. 12(6), 1469–1475 (2006)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2018 Springer Nature Switzerland AG
About this chapter
Cite this chapter
Zimmermann, H. (2018). Integrated Silicon Photodetectors. In: Silicon Optoelectronic Integrated Circuits. Springer Series in Advanced Microelectronics, vol 13. Springer, Cham. https://doi.org/10.1007/978-3-030-05822-7_2
Download citation
DOI: https://doi.org/10.1007/978-3-030-05822-7_2
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-05821-0
Online ISBN: 978-3-030-05822-7
eBook Packages: Physics and AstronomyPhysics and Astronomy (R0)