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Automated Technology for Verification and Analysis

21st International Symposium, ATVA 2023, Singapore, October 24–27, 2023, Proceedings, Part II

  • Conference proceedings
  • © 2023

Overview

Editors:
  1. Étienne André

    1. Université Sorbonne Paris Nord, Villetaneuse, France

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    You can also search for this editor in PubMed   Google Scholar

  2. Jun Sun

    1. Singapore Management University, Singapore, Singapore

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    You can also search for this editor in PubMed   Google Scholar

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 14216)

Included in the following conference series:

Conference proceedings info: ATVA 2023.

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About this book

This book constitutes the refereed proceedings of the 21st International Symposium on Automated Technology for Verification and Analysis, ATVA 2023, held in Singapore, in  October 2023. The symposium intends to promote research in theoretical and practical aspects of automated analysis, verification and synthesis by providing a forum for interaction between regional and international research communities and industry in related areas. The 30 regular papers presented together with 7 tool papers were carefully reviewed and selected from 150 submissions.The papers are divided into the following topical sub-headings: Temporal logics, Data structures and heuristics, Verification of programs and hardware.

Keywords

Table of contents (18 papers)

  1. Front Matter

    Pages i-xv
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  2. Temporal Logics

    1. Front Matter

      Pages 1-1
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    2. Lightweight Verification of Hyperproperties

      • Oyendrila Dobe, Stefan Schupp, Ezio Bartocci, Borzoo Bonakdarpour, Axel Legay, Miroslav Pajic et al.
      Pages 3-25

    3. Specification Sketching for Linear Temporal Logic

      • Simon Lutz, Daniel Neider, Rajarshi Roy
      Pages 26-48

  3. Data Structures and Heuristics

    1. Front Matter

      Pages 49-49
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    2. On the Difficulty of Intersection Checking with Polynomial Zonotopes

      • Yushen Huang, Ertai Luo, Stanley Bak, Yifan Sun
      Pages 51-71

    3. Predicting Memory Demands of BDD Operations Using Maximum Graph Cuts

      • Steffan Christ Sølvsten, Jaco van de Pol
      Pages 72-92

    4. Better Predicates and Heuristics for Improved Commutativity Synthesis

      • Adam Chen, Parisa Fathololumi, Mihai Nicola, Jared Pincus, Tegan Brennan, Eric Koskinen
      Pages 93-113

  4. Verification of Programs and Hardware

    1. Front Matter

      Pages 115-115
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    2. Structure-Guided Solution of Constrained Horn Clauses

      • Omer Rappoport, Orna Grumberg, Yakir Vizel
      Pages 117-138

    3. Automated Property Directed Self Composition

      • Akshatha Shenoy, Sumanth Prabhu, Kumar Madhukar, Ron Shemer, Mandayam Srivas
      Pages 139-158

    4. Minimally Comparing Relational Abstract Domains

      • Kenny Ballou, Elena Sherman
      Pages 159-175

    5. Tailoring Stateless Model Checking for Event-Driven Multi-threaded Programs

      • Parosh Aziz Abdulla, Mohamed Faouzi Atig, Frederik Meyer Bønneland, Sarbojit Das, Bengt Jonsson, Magnus Lång et al.
      Pages 176-198

    6. Fast Equivalence Checking of Quantum Circuits of Clifford Gates

      • Dimitrios Thanos, Tim Coopmans, Alfons Laarman
      Pages 199-216

    7. Automatic Verification of High-Level Executable Models Running on FPGAs

      • Morgan McColl, Callum McColl, René Hexel
      Pages 217-234

  5. Tool Papers

    1. Front Matter

      Pages 235-235
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    2. AutoKoopman: A Toolbox for Automated System Identification via Koopman Operator Linearization

      • Ethan Lew, Abdelrahman Hekal, Kostiantyn Potomkin, Niklas Kochdumper, Brandon Hencey, Stanley Bak et al.
      Pages 237-250

    3. Leveraging Static Analysis: An IDE for RTLola

      • Bernd Finkbeiner, Florian Kohn, Malte Schledjewski
      Pages 251-262

    4. pymwp: A Static Analyzer Determining Polynomial Growth Bounds

      • Clément Aubert, Thomas Rubiano, Neea Rusch, Thomas Seiller
      Pages 263-275

    5. ppLTLTT : Temporal Testing for Pure-Past Linear Temporal Logic Formulae

      • Shaun Azzopardi, David Lidell, Nir Piterman, Gerardo Schneider
      Pages 276-287
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Other volumes

  1. Automated Technology for Verification and Analysis

  2. Automated Technology for Verification and Analysis

Editors and Affiliations

  • Université Sorbonne Paris Nord, Villetaneuse, France

    Étienne André

  • Singapore Management University, Singapore, Singapore

    Jun Sun

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