SpringerLink
Log in

Technique of Control of the Gate Dielectric of MIS Structures Based on High-Field Charge Injection

  • METHODS OF STUDY OF PROPERTIES OF MATERIALS
  • Published:
Inorganic Materials: Applied Research Aims and scope

Abstract

A new method is proposed for studying the charge characteristics and control of quality of thin dielectric films of MIS structures based on a modification of the method of high-field injection of a charge into a dielectric in an increasing current mode. The technique is based on applying to the investigated MIS structure an increasing current stress, in which, in addition to the parameters characterizing the breakdown of the dielectric, the changes in its charge state are monitored. For this purpose, at injection current densities where changes in the charge state of the MIS structure become noticeable, before switching the current to a step with a larger current value, a short-term switching to the injection mode by measuring the current level (Jm) is carried out. The current density Jm is selected from the condition that there should be no noticeable change in the charge state of the dielectric, and switching to the measuring mode should not have a noticeable effect on the test process. As a result, it is possible to obtain the dependence of the voltage change across the MIS structure on time or the value of the injected charge at a constant fixed value of the measuring injection current Jm over the entire range of exposure to increasing current stress. From these dependences, it is possible to determine the main parameters characterizing the charge processes occurring in the MIS structure during high-field injection of electrons and determining the degradation phenomena observed in the film of the gate dielectric.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
EUR 32.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or Ebook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price includes VAT (France)

Instant access to the full article PDF.

Institutional subscriptions

Fig 1.
Fig. 2.
Fig. 3.

Similar content being viewed by others

REFERENCES

  1. Lombardo, S., Stathis, J.H., Linder, P., Pey, K.L., Palumbo, F., and Tung, C.H., Dielectric breakdown mechanisms in gate oxides, J. Appl. Phys., 2005, vol. 98, art. ID 121301.

  2. Strong, A.W., Wu, E.Y., Vollertsen, R.-P., Suñé, J., La Rosa, G., Sullivan, T.D., and Rauch, S.E. III, Reliability Wearout Mechanisms in Advanced CMOS Technologies, New Jersey: Wiley–IEEE, 2009.

  3. Wu, E.Y., Facts and myths of dielectric breakdown processes—Part I: Statistics, experimental, and physical acceleration models, IEEE Trans. Electron Devices, 2019, vol. 66, pp. 4523–4534.

    Article  CAS  Google Scholar 

  4. Palumbo, F., We, C., Lombardo, S., Pazos, S., Aguirre, F., Eizenberg, M., Hui, F., and Lanza, M., A review on dielectric breakdown in thin dielectrics: Silicon dioxide, high-k, and layered dielectrics, Adv. Funct. Mater., 2019, vol. 30, no. 18, art. ID 1900657. https://doi.org/10.1002/adfm.201900657

  5. Gritsenko, V.A., Hot electrons in silicon oxide, Phys.-Usp., 2017, vol. 60, no. 9, pp. 920–910.

    Article  Google Scholar 

  6. McPherson, J.W., Time dependent dielectric breakdown physics–models revisited, Microelectron. Reliab., 2012, vol. 52, pp. 1753–1760.

    Article  CAS  Google Scholar 

  7. Fischetti, M.V., Generation of positive charge in silicon dioxide during avalanche and tunnel electron injection, J. Appl. Phys., 1985, vol. 57, pp. 2860–2879.

    Article  CAS  Google Scholar 

  8. Arnold, D., Cartier, E., and DiMaria, D.J., Theory of high-field electron transport and impact ionization in silicon dioxide, Phys. Rev. B, 1994, vol. 49, no. 15, pp. 10278–10297.

    Article  CAS  Google Scholar 

  9. Martin, A., Hagen, J., and Alers, G.B., Ramped current stress for fast and reliable wafer level reliability monitoring of thin gate oxide reliability, Microelectron. Reliab., 2003, vol. 43, pp. 1215–1220.

    Article  Google Scholar 

  10. JEDEC Standard, JESD35-A: Procedure for the Wafer–Level Testing of Thin Dielectrics, 2001.

  11. JEDEC Standard, JESD92: Procedure for Characterizing Time Depend Dielectric Breakdown of Ultra-Thin Gate Dielectrics, 2003.

  12. Kim, A., Wu, E., Li, B., and Linder, B., Transformation of ramped current stress VBD to constant voltage stress TDDB TBD, IEEE Int. Reliability Physics Symp. (IRPS), Monterey, CA, USA, 2019, pp. 1–5.

  13. Martin, A., Vollertsen, R.-P., Mitchell, A., Traving, M., Beckmeier, D., and Nielen, H., Fast wafer level reliability monitoring as a tool to achieve automotive quality for a wafer process, Microelectron. Reliab., 2016, vol. 64, pp. 2–12.

    Article  CAS  Google Scholar 

  14. Andreev, V.V., Bondarenko, G.G., Maslovsky, V.M., Stolyarov, A.A., and Andreev, D.V., Control current stress technique for the investigation of gate dielectrics of MIS devices, Phys. Status Solidi C, 2015, vol. 12, no. 3, pp. 299–303.

    Article  CAS  Google Scholar 

  15. Andreev, D.V., Bondarenko, G.G., Andreev, V.V., and Stolyarov, A.A., Method of stress and measurement current levels for MIS structures researching and modifying under high-field injection of electrons, IOP Conf. Ser.: Mater. Sci. Eng., 2017, vol. 168, art. ID 012057.

  16. Andreev, V.V., Maslovsky, V.M., Andreev, D.V., and Stolyarov, A.A., Method of stress and measurement modes for research of thin dielectric films of MIS structures, Proc. SPIE, 2016, vol. 10224, art. ID 1022429.

  17. Sivchenko, A.S., Kuznetsov, E.V., and Saurov, A.N., Determination of the operating time to failure of a sub-100-nm MOS transistor gate dielectric using accelerated tests, Russ. Microelectron., 2020, vol. 49, pp. 479–484. https://doi.org/10.1134/S1063739720070124

    Article  CAS  Google Scholar 

  18. Solodukha, V.A., Chigir, G.G., Pilipenko, V.A., Filipenya, V.A., and Gorushko, V.A., Reliability express control of the gate dielectric of semiconductor devices, Prib. Metody Izmer., 2018, vol. 9, no. 4, pp. 306–313.

    Google Scholar 

  19. Andreev, D.V., Bondarenko, G.G., Andreev, V.V., and Stolyarov, A.A., Use of high-field electron injection into dielectrics to enhance functional capabilities of radiation MOS sensors, Sensors, 2020, vol. 20, no. 8, art. ID 2382.

  20. Andreev, D.V., Bondarenko, G.G., Andreev, V.V., Maslovsky, V.M., and Stolyarov, A.A., Modification of MIS devices by radio-frequency plasma treatment, Acta Phys. Pol., A, 2019, vol. 136, no. 2, pp. 263–266.

    Article  CAS  Google Scholar 

  21. Andreev, D.V., Bondarenko, G.G., Andreev, V.V., and Stolyarov, A.A., Automatized setup for researching of MIS structures under high-field tunnel injection of electrons at stress and measurement conditions, IEEE Proc. Moscow Workshop on Electronic and Networking Technologies (MWENT), Moscow, Russia, 2018, pp. 1–3.

  22. Nissan-Cohen, Y., Shappir, J., and Frohman-Bentchkowsky, D., High-field and current-induced positive charge in thermal SiO2 layers, J. Appl. Phys., 1985, vol. 57, no. 8, pp. 2830–2839.

    Article  CAS  Google Scholar 

  23. Andreev, D.V., Bondarenko, G.G., Andreev, V.V., and Stolyarov, A.A., Increasing the charge stability of gate dielectric films of MIS structures by do** them with phosphorus, Inorg. Mater.: Appl. Res., 2021, vol. 12, no. 2, pp. 517–520.

    Article  Google Scholar 

  24. Ristic, G.S., Defect behaviors during high electric field stress of p-channel power MOSFETs, IEEE Trans. Device Mater. Reliab., 2012, vol. 12, no. 1, pp. 94–100.

    Article  CAS  Google Scholar 

  25. DiMaria, D.J., Cartier, E., and Buchanan, D.A., Anode hole injection and trap** in silicon dioxide, J. Appl. Phys., 1996, vol. 80, no. 1, pp. 304–317.

    Article  CAS  Google Scholar 

  26. Pazos, S.M., Baldomá, S.B., Aguirre, F.L., Krylov, I., Eizenberg, M., and Palumbo, F., Impact of bilayered oxide stacks on the breakdown transients of metal–oxide–semiconductor devices: An experimental study, J. Appl. Phys., 2020, vol. 127, art. ID 174101.

Download references

Funding

This study was financially supported by the Ministry of Science and Higher Education of the Russian Federation as a part of the project “Fundamental Research on Methods for Digital Transformation of the Component Base of Micro- and Nanosystems,” no. 0705-2020-0041.

Author information

Authors and Affiliations

  1. Bauman Moscow State Technical University, Kaluga Branch, 248000, Kaluga, Russia

    D. V. Andreev

Authors
  1. D. V. Andreev
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to D. V. Andreev.

Additional information

Translated by S. Rostovtseva

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Andreev, D.V. Technique of Control of the Gate Dielectric of MIS Structures Based on High-Field Charge Injection. Inorg. Mater. Appl. Res. 13, 575–579 (2022). https://doi.org/10.1134/S2075113322020058

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1134/S2075113322020058

Keywords:

Search

Navigation