SpringerLink
Log in

Transmission Line Pulse Setup for Electrostatic Discharge Robustness Testing of the Semiconductor Devices

  • ELECTRONICS AND RADIO ENGINEERING
  • Published:
Instruments and Experimental Techniques Aims and scope Submit manuscript

Abstract

An original transmission line pulse setup has been presented. This test setup allows to measure quasi-static I–V curves of the semiconductor devices and electrostatic discharge protection and investigate the electrostatic discharge robustness of the integrated circuits. The setup allows to perform both destructive and nondestructive tests. The designed test setup allows to perform transmission line pulse test using 100 ns pulse with current peak value up to 10 A according to the IEC62615 international standard.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
EUR 32.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or Ebook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1.
Fig. 2.
Fig. 3.
Fig. 4.
Fig. 5.
Fig. 6.
Fig. 7.

REFERENCES

  1. Semkin, N.D., Voronov, K.E., Il’in, A.B., Piyakov, A.V., Shatrov, S.A., and Plokhotnichenko, P.G., Instrum. Exp. Tech., 2017, vol. 60, no. 2, pp. 258–265. https://doi.org/10.1134/S0020441217010274

    Article  Google Scholar 

  2. Abrameshin, A.E., Galukhin, I.A., Kechiev, L.N., Kuznetsov, V.V., and Nazarov, R.V., Tekhnol. Elektromagn. Sovmestimosti, 2012, no. 3, p. 44.

  3. Voldman, S.H., Proc. 9th Int. Conf. on Solid-State and Integrated-Circuit Technology, Bei**g, 2008, p. 325. https://doi.org/10.1109/ICSICT.2008.4734537

  4. Ammer, M., Esmark, K., zur Nieden, F., Rupp, A., Cao, Y., Sauter, M., and Maurer, L., Proc. 39th Electrical Overstress/Electrostatic Discharge Symp. (EOS/ESD), Tucson, 2017, p. 1. https://doi.org/10.23919/EOSESD.2017.8073438

  5. Naumov, V.V., Grebenshchikov, O.A., and Zalesskii, V.B., Prib. Tekh. Eksp., 2007, no. 1, p. 164.

  6. Barth, J.E., Verhaege, K., Henry, L.G., and Richner, J., IEEE Trans. Electron. Packag. Manuf., 2001, vol. 24, p. 99. https://doi.org/10.1109/6104.930960

    Article  Google Scholar 

  7. Ashton, R.A., Proc. Int. Conf. on Microelectronic Test Structures, Nara, 1995, p. 127. https://doi.org/10.1109/ICMTS.1995.513959

  8. V’yukhin, V.N., Instrum. Exp. Tech., 2020, vol. 63, no. 1, pp. 46–49. https://doi.org/10.1134/S0020441219060216

    Article  Google Scholar 

  9. Du, F., Song, S., Hou, F., Song, W., Chen, L., Liu, J., and Liou, J.J., IEEE Electron. Device Lett., 2019, vol. 40, p. 1491. https://doi.org/10.1109/LED.2019.2926103

    Article  ADS  Google Scholar 

  10. Teh, G.L. and Chim, W.K., Proc. 6th Int. Symp. on the Physical and Failure Analysis of Integrated Circuits, Singapore, 1997, p. 156. https://doi.org/10.1109/IPFA.1997.638186

  11. Kuznetsov, V., IEEE Trans. Electromagn. Compat., 2018, vol. 60, p. 107. https://doi.org/10.1109/TEMC.2017.2700492

    Article  Google Scholar 

  12. Maksimov, I.V., Kuznetsov, V.V., and Andreev, V.V., Tekhnol. Elektromagn. Sovmestimosti, 2017, no. 4(63), p. 35.

  13. Andreev, D.V., Maslovsky, V.M., Andreev, V.V., and Stolyarov, A.A., Phys. Status Solidi A, 2022, vol. 219, p. 2100400. https://doi.org/10.1002/pssa.202100400

Download references

Funding

The work was supported by the Russian Ministry of education and Science withing the framework of the State Contract № FSFN-2024-0027.

Author information

Authors and Affiliations

  1. Bauman Moscow State Technical University, the Kaluga Branch, 248000, Kaluga, Russia

    V. V. Kuznetsov & V. V. Andreev

Authors
  1. V. V. Kuznetsov
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. V. V. Andreev
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding authors

Correspondence to V. V. Kuznetsov or V. V. Andreev.

Ethics declarations

The authors of this work declare that they have no conflicts of interest.

Additional information

Publisher’s Note.

Pleiades Publishing remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Kuznetsov, V.V., Andreev, V.V. Transmission Line Pulse Setup for Electrostatic Discharge Robustness Testing of the Semiconductor Devices. Instrum Exp Tech 67, 268–273 (2024). https://doi.org/10.1134/S0020441224700453

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1134/S0020441224700453

Keywords:

Search

Navigation