SpringerLink
Log in

A normalized compensation method for voltage nonlinearity of three-level ANPC inverter

  • Original Article
  • Published:
Journal of Power Electronics Aims and scope Submit manuscript

Abstract

This paper proposes a normalized compensation method for voltage nonlinearity of the three-level active neutral point clamped (3L ANPC) inverter. The operation of the 3L ANPC inverter includes the voltage nonlinearity caused by voltage errors, which are induced by the nonlinear components of switching devices and their operations. Since this voltage nonlinearity seriously distorts the phase current, it must be compensated to improve the quality of power conversion. For the 3L ANPC inverter, however, the voltage nonlinearity varies depending on the topology and modulation scheme, as well as the power factor of the system. Although many conventional methods have been proposed, these methods do not fully deal with the factors affecting the voltage nonlinearity. In this paper, a normalized compensation method for the voltage nonlinearity considering the characteristics of the 3L ANPC inverter and the power factor of the system is proposed. Two general topologies and modulation schemes of the 3L ANPC inverter are discussed in this paper, and the voltage nonlinearity is analyzed to derive the compensation components. By executing the compensation based on these analyses, the proposed method ensures its performance remains consistent across operating conditions, and is simply implemented. The effectiveness of the proposed method is verified by experimental results.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
EUR 32.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or Ebook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price includes VAT (Brazil)

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12

Similar content being viewed by others

Data availability

Data are contained within the article.

References

  1. Bruckner, T., Bemet, S.: Loss balancing in three-level voltage source inverters applying active NPC switches. In: Proceedings of IEEE 32nd Annual Power Electronics Specialists Conference, vol. 2, pp. 1135–1140. (2001)

  2. He, J., Zhang, D., Pan, D.: PWM strategy for MW-scale “SiC+Si” ANPC converter in aircraft propulsion applications. IEEE Trans. Ind. Appl. 57(3), 3077–3086 (2021)

    Article  Google Scholar 

  3. Belkhode, S., Shukla, A., Doolla, S.: Enhanced hybrid active-neutral-point-clamped converter with optimized loss distribution-based modulation scheme. IEEE Trans. Power Electron. 36(3), 3600–3612 (2021)

    Article  Google Scholar 

  4. Jiao, Y., Lee, F.C.: New modulation scheme for three-level active neutral-point-clamped converter with loss and stress reduction. IEEE Trans. Ind. Electron. 62(9), 5468–5479 (2015)

    Article  Google Scholar 

  5. Feng, Z., Zhang, X., Yu, S., Zhuang, J.: Comparative study of 2SiC&4Si hybrid configuration schemes in ANPC inverter. IEEE Access 8, 33934–33943 (2020)

    Article  Google Scholar 

  6. Woldegiorgis, D., Wu, Y., Wei, Y., Mantooth, H.A.: A high efficiency and low cost ANPC inverter using hybrid Si/SiC switches. IEEE Open J. Ind. Appl. 2, 154–167 (2021)

    Article  Google Scholar 

  7. Guan, Q.-X., et al.: An extremely high efficient three-level active neutral-point-clamped converter comprising SiC and Si hybrid power stages. IEEE Trans. Power Electron. 33(10), 8341–8352 (2018)

    Article  Google Scholar 

  8. Zhang, L., et al.: Evaluation of different Si/SiC hybrid three-level active NPC inverters for high power density. IEEE Trans. Power Electron. 35(8), 8224–8236 (2020)

    Article  Google Scholar 

  9. Bruckner, T., Bernet, S., Guldner, H.: The active NPC converter and its loss-balancing control. IEEE Trans. Ind. Electron. 52(3), 855–868 (2005)

    Article  Google Scholar 

  10. Floricau, D., Floricau, E., Gateau, G.: Three-level active NPC converter: PWM strategies and loss distribution. In: Proceedings of IEEE 34th Annual Conference of IEEE Industrial Electronics, pp. 3333–3338. (2008)

  11. Hong, S.-J., Shin, S.-C., Kim, H.-S., Won, C.-Y.: Dead-time compensation and realization method for 3-level NPC inverter. In: Proceedings of IEEE Conference and Expo Transportation Electrification Asia-Pacific (ITEC Asia-Pacific), pp. 1–5. (2014)

  12. Kan, Y., Hyun, S.-W., Hong, S.-J., Won, C.-Y.: Zero dead-time PWM implementation method for reducing total harmonic distortion in 3-level NPC inverter. In: Proceedings of IEEE International Conference on Electrical Machines and Systems. (ICEMS), pp. 1069–1073. (2015)

  13. Leggate, D., Kerkman, R.: Pulse-based dead-time compensator for PWM voltage inverters. IEEE Trans. Ind. Electron. 44(2), 191–197 (1997)

    Article  Google Scholar 

  14. Rathnayake, D.B. et al.: An enhanced pulse-based dead-time compensation technique for PWM-VSI drives. In: Proceedings of International Conference on Industrial and Information Systems, pp. 1–5. (2015)

  15. Weerakoon, D.B.R., Sandaruwan, B.L.L., De Silva, R.T.T., Abeyratne, S.G., Rathnayake, D.B.: A novel dead-time compensation scheme for PWM VSI drives. In: Proceedings of International Conference on Information and Automation for Sustainability. (ICIAS), pp. 1–6. (2016)

  16. Shen, Z., Jiang, D.: Dead-time effect compensation method based on current ripple prediction for voltage-source inverters. IEEE Trans. Power Electron. 34(1), 971–983 (2019)

    Article  Google Scholar 

  17. Munoz, A., Lipo, T.: On-line dead-time compensation technique for open-loop PWM-VSI drives. IEEE Trans. Power Electron. 14(4), 683–689 (1999)

    Article  Google Scholar 

  18. Sukegawa, T., Kamiyama, K., Mizuno, K., Matsui, T., Okuyama, T.: Fully digital, vector-controlled PWM VSI-fed AC drives with an inverter dead-time compensation strategy. IEEE Trans. Ind. Appl. 27(3), 552–559 (1991)

    Article  Google Scholar 

  19. Park, C.-S., Jung, T.-U.: Online dead time effect compensation algorithm of PWM inverter for motor drive using PR controller. J. Electr. Eng. Technol. 12(3), 1137–1145 (2017)

    Article  Google Scholar 

  20. Han, S.H., Jo, T.H., Park, J.H., Kim, H.G.: Dead time compensation for grid-connected PWM inverter. In: Proceedings of 8th International Conference on Power Electronics, pp. 876–881. (2011)

  21. **ao, F., Dong, L., Khahro, S.F., Huang, X., Liao, X.: A smooth LVRT control strategy for single-phase two-stage grid-connected PV inverters. J. Power Electron. 15(3), 806–818 (2015)

    Article  Google Scholar 

  22. Kwak, R., Lee, J.-H., Lee, K.-B.: Active frequency drift method for islanding detection applied to micro-inverter with uncontrollable reactive power. J. Power Electron. 16(5), 1918–1927 (2016)

    Article  Google Scholar 

  23. Huang, S., Luo, J.: Multi-function distributed generation with active power filter and reactive power compensator. J. Power Electron. 18(6), 1855–1865 (2018)

    Google Scholar 

Download references

Funding

This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2022R1F1A1074316), and by Korea Institute for Advancement of Technology (KIAT) grant funded by the MOTIE ‘The Competency Development Program for Industry specialist’ (Foster R&D specialist of parts for eco-friendly vehicle (xEV), No. P0017120).

Author information

Authors and Affiliations

  1. Department of Electronics and Electrical Engineering, Dankook University, Yongin, Republic of Korea

    Juyeon Lee & June-Seok Lee

Authors
  1. Juyeon Lee
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. June-Seok Lee
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to June-Seok Lee.

Ethics declarations

Conflict of interest

June-Seok Lee was the Associate Editor of the Journal of Power Electronics while conducting this study. Editorial Board Member status has no bearing on editorial consideration.

Rights and permissions

Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Lee, J., Lee, JS. A normalized compensation method for voltage nonlinearity of three-level ANPC inverter. J. Power Electron. (2024). https://doi.org/10.1007/s43236-024-00860-y

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • DOI: https://doi.org/10.1007/s43236-024-00860-y

Keywords

Search

Navigation