Abstract
In the present work, CdSe thin film has been deposited on indium tin oxide (ITO)-coated glass substrate by the pulsed laser deposition (PLD) technique. Temperature-dependent current–voltage and capacitance–voltage characterization approaches are used to study the influence of post-deposition heat treatment (at temperatures of 150, 250, and 350 °C) on electrical properties. It is observed that the zero-bias barrier height and the ideality factor are substantially temperature dependent. The Mott–Schottky plot confirmed that the prepared CdSe thin film is an n-type semiconductor. The bandgap is estimated from the absorption data of the UV–Vis spectrometer using Tauc’s plot. This paper provides a thorough explanation of how electronic energy level diagram of the CdSe thin film on ITO-coated glass substrate was determined.
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The data sets generated during and/or analyzed during the current studies are available from the corresponding author on reasonable request.
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Acknowledgements
The authors are thankful to the University of Puerto Rio, Rio Piedras Campus SPECLAB, San Juan, USA, for providing the deposition and characterization facilities. The author acknowledges UGC New Delhi under Raman Fellowship (Grant No. 5-142/2016(IC)). The author also thankful to the Material Science Lab, Department of Physics, Gurukul Kangri (Deemed to be University), Haridwar-249404, Uttarakhand, India, for providing other lab facilities.
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Kumar, P., Sarkar, P., Nisha et al. The impact of annealing on the electrical properties of ITO/n-CdSe Schottky junctions deposited by pulsed laser deposition technique. Indian J Phys 97, 1417–1435 (2023). https://doi.org/10.1007/s12648-022-02473-2
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DOI: https://doi.org/10.1007/s12648-022-02473-2